Debug generator rewriter

benchmarks/debug.py

@@ -0,0 +1,46 @@
+import pygal
+import timeit
+import magma as m
+
+
+def gen_circuit(debug_mode, n=8):
+    if debug_mode == 2:
+        m.config.config.use_generator_debug_rewriter = True
+    else:
+        m.config.config.use_generator_debug_rewriter = False
+
+    class Foo(m.Generator2):
+        if debug_mode == 2:
+            def __init__(self, n):
+                self.io = m.IO(I=m.In(m.Bits[n]), O=m.Out(m.Bit))
+                x = m.Bits[n]()
+                x @= ~self.io.I
+                self.io.O @= x.reduce_xor()
+        elif debug_mode == 1:
+            def __init__(self, n):
+                m.config.set_debug_mode(True)
+                self.io = m.IO(I=m.In(m.Bits[n]), O=m.Out(m.Bit))
+                x = m.Bits[n]()
+                x @= ~self.io.I
+                self.io.O @= x.reduce_xor()
+                m.config.set_debug_mode(False)
+        else:
+            def __init__(self, n):
+                self.io = m.IO(I=m.In(m.Bits[n]), O=m.Out(m.Bit))
+                x = m.Bits[n]()
+                x @= ~self.io.I
+                self.io.O @= x.reduce_xor()
+    Foo(n)
+
+
+data = {}
+
+for debug_mode in [0, 1, 2]:
+    data[debug_mode] = timeit.Timer(lambda:
+                                    gen_circuit(debug_mode)).timeit(number=10)
+
+bar = pygal.Bar()
+bar.add('Off', data[0])
+bar.add('Old', data[1])
+bar.add('New', data[2])
+bar.render_to_file("debug.svg")

conftest.py

@@ -1,11 +1,15 @@
 import pytest
-import magma.config
 from magma.config import config as magma_config
 from magma.util import reset_global_context
 
 
 def pytest_configure(config):
     magma_config.compile_dir = 'callee_file_dir'
+    magma_config.use_namer_dict = True
+    magma_config.use_generator_debug_rewriter = True
+    # TODO: Enable this globally for testing
+    # revert a3a2452168f2251277a14548d053a9ca7a45bff7 for golds
+    # magma_config.use_namer_dict = True
     magma_config.use_uinspect = True
 
 

magma/__init__.py

@@ -125,6 +125,7 @@ def set_mantle_target(t):
 from magma.when import when, elsewhen, otherwise
 from magma.value_utils import fill
 from magma.bind2 import bind2, make_bind_ports
+from magma.debug_rewriter import debug
 
 ################################################################################
 # BEGIN ALIASES

magma/backend/check_wiring_context.py

@@ -21,6 +21,7 @@ def check_wiring_context(i, o):
     """
     Ensures that i and o come from the same definition context
     """
+    orig_i, orig_o = i, o
     if isinstance(o, Slice):
         o = o.value
     if isinstance(i, Slice):
@@ -53,5 +54,5 @@ def check_wiring_context(i, o):
             o_inst.defn is i_inst.defn):
         return
     raise MagmaCompileException(
-        f"Cannot wire {o.debug_name} to {i.debug_name} because they are"
-        " not from the same definition context")
+        f"Cannot wire {orig_o.debug_name} to {orig_i.debug_name} because they "
+        "are not from the same definition context")

magma/circuit.py

@@ -6,11 +6,10 @@
 from functools import wraps
 import functools
 import operator
-from collections import namedtuple
+from collections import namedtuple, Counter
 import os
-from typing import Callable, Dict, List
+from typing import Callable, Dict, List, Union
 
-import six
 from . import cache_definition
 from .common import deprecated, setattrs, OrderedIdentitySet
 from .interface import *
@@ -28,6 +27,7 @@
     pass
 
 from magma.clock import is_clock_or_nested_clock, Clock, ClockTypes
+from magma.config import get_debug_mode, set_debug_mode, config, RuntimeConfig
 from magma.definition_context import (
     DefinitionContext,
     definition_context_manager,
@@ -37,8 +37,9 @@
 )
 from magma.find_unconnected_ports import find_and_log_unconnected_ports
 from magma.logging import root_logger, capture_logs
-from magma.ref import TempNamedRef
-from magma.t import In
+from magma.protocol_type import MagmaProtocol
+from magma.ref import TempNamedRef, AnonRef
+from magma.t import In, Type
 from magma.view import PortView
 from magma.wire_container import WiringLog, AggregateWireable
 
@@ -204,14 +205,78 @@ def _get_intermediate_values(value):
     return values
 
 
+class NamerDict(dict):
+    def __init__(self, *args, **kwargs):
+        super().__init__(*args, **kwargs)
+        self._inferred_names = {}
+
+    def _set_name(self, key, value):
+        if isinstance(value, (Type, MagmaProtocol)):
+            key = TempNamedRef(key, value)
+        value.name = key
+
+    def _check_unique_name(
+        self,
+        key: str,
+        value: Union[Type, 'Circuit'],
+    ):
+        """If key has been seen more than once, "uniquify" the names by append
+           _{i} to them."""
+        values = self._inferred_names.setdefault(key, [])
+        if len(values) == 0:
+            self._set_name(key, value)
+        elif any(value is x for x in values):
+            # Already uniquified
+            return
+        else:
+            if len(values) == 1:
+                # Make the first value consistent by append _0
+                self._set_name(f"{key}_0", values[0])
+            self._set_name(f"{key}_{len(values)}", value)
+        values.append(value)
+
+    def _set_value_name(self, key: str, value: Type):
+        if not hasattr(value, "name"):
+            return  # Interface object is a Type without a name.
+        if isinstance(value.name, AnonRef):
+            self._check_unique_name(key, value)
+        elif isinstance(value.name, TempNamedRef):
+            self._check_unique_name(value.name.name, value)
+
+    def _set_inst_name(self, key: str, value: 'Circuit'):
+        if not value.name:
+            self._check_unique_name(key, value)
+        else:
+            self._check_unique_name(value.name, value)
+
+    def __setitem__(self, key, value):
+        super().__setitem__(key, value)
+        if isinstance(value, (Type, MagmaProtocol)):
+            self._set_value_name(key, value)
+        elif isinstance(type(value), CircuitKind):
+            # NOTE: we check type(value) because this code is run in the Circuit
+            # class creation pipeline (so Circuit may not be defined yet).
+            self._set_inst_name(key, value)
+
+    def __hash__(self):
+        return hash(tuple(sorted(self.items())))
+
+
+config.register(use_namer_dict=RuntimeConfig(False))
+
+
 class CircuitKind(type):
     def __prepare__(name, bases, **kwargs):
         ctx = DefinitionContext(StagedPlacer(name))
         push_definition_context(ctx, use_staged_logger=True)
+        if config.use_namer_dict:
+            return NamerDict()
         return type.__prepare__(name, bases, **kwargs)
 
     """Metaclass for creating circuits."""
     def __new__(metacls, name, bases, dct):
+        if isinstance(dct, NamerDict):
+            dct = dict(dct)  # resolve to dict, no longer need name logic
         # Override class name if supplied (and save class name).
         cls_name = dct.get("_cls_name_", name)
         name = dct.setdefault('name', name)
@@ -359,8 +424,7 @@ def inline_verilog(cls, inline_str, **kwargs):
             m_inline_verilog(inline_str, **kwargs)
 
 
-@six.add_metaclass(CircuitKind)
-class AnonymousCircuitType(object):
+class AnonymousCircuitType(object, metaclass=CircuitKind):
     """Abstract base class for circuits"""
 
     _circuit_base_ = True
@@ -390,12 +454,18 @@ def set_debug_info(self, debug_info):
         self.debug_info = debug_info
 
     def __str__(self):
-        if self.name:
-            return f"{self.name}<{type(self)}>"
-        name = f"AnonymousCircuitInst{id(self)}"
-        interface = ", ".join(f"{name}: {type(value)}"
-                              for name, value in self.interface.ports.items())
-        return f"{name}<{interface}>"
+        name = self.name
+        if not name:
+            name = f"AnonymousCircuitInst{id(self)}"
+        if type(self) is AnonymousCircuitType:
+            interface = ", ".join(
+                f"{name}: {type(value)}"
+                for name, value in self.interface.ports.items()
+            )
+            name += f"<{interface}>"
+        else:
+            name += f"<{type(self)}>"
+        return name
 
     def __repr__(self):
         args = []
@@ -685,8 +755,7 @@ def bind(cls, monitor, *args, compile_guard=None):
         cls.bind_modules[monitor] = (args, compile_guard)
 
 
-@six.add_metaclass(DefineCircuitKind)
-class Circuit(CircuitType):
+class Circuit(CircuitType, metaclass=DefineCircuitKind):
     _circuit_base_ = True
 
 

magma/config.py

@@ -59,8 +59,7 @@ class ConfigManager:
     __entries = {}
 
     def __init__(self, **kwargs):
-        for key, value in kwargs.items():
-            ConfigManager.__entries[key] = value
+        self._register(**kwargs)
 
     def _register(self, **kwargs):
         for key, value in kwargs.items():
@@ -92,6 +91,7 @@ def __setitem__(self, key, value):
 
 config = ConfigManager(
     compile_dir=RuntimeConfig("normal"),
+    use_generator_debug_rewriter=RuntimeConfig(False),
     debug_mode=RuntimeConfig(False)
 )
 

magma/debug_rewriter.py

@@ -0,0 +1,60 @@
+import inspect
+import textwrap
+
+import libcst as cst
+from magma.t import Type
+from magma.ref import AnonRef, NamedRef
+
+
+class Transformer(cst.CSTTransformer):
+    METADATA_DEPENDENCIES = (cst.metadata.PositionProvider,)
+
+    def leave_Assign(
+        self, original_node: cst.FunctionDef, updated_node: cst.FunctionDef
+    ) -> cst.CSTNode:
+        if len(updated_node.targets) != 1:
+            # TODO: handle chained assigns
+            return updated_node
+        if not isinstance(updated_node.targets[0], cst.AssignTarget):
+            # TODO: Handle this case
+            return updated_node
+        if not isinstance(updated_node.targets[0].target, cst.Name):
+            return updated_node
+
+        name = updated_node.targets[0].target.value
+        targets = updated_node.targets + (
+            cst.AssignTarget(cst.parse_expression(f"self.{name}")),
+        )
+        return updated_node.with_changes(targets=targets)
+
+    def visit_FunctionDef(self, node: cst.FunctionDef) -> bool:
+        return True
+
+    def leave_FunctionDef(
+        self, original_node: cst.FunctionDef, updated_node: cst.FunctionDef
+    ) -> cst.CSTNode:
+        return updated_node.with_changes(decorators=[])
+
+
+def debug(fn):
+    indented_program_txt = inspect.getsource(fn)
+    program_txt = textwrap.dedent(indented_program_txt)
+    # Dedenting might not work because they might have a triple block quote
+    # string that's not indented, so as a fallback we try removing the initial
+    # indent at least, which is fine if the body is overindented as long as it's
+    # consistent
+    program_txt = program_txt.lstrip()
+    tree = cst.parse_module(program_txt)
+    tree = tree.visit(Transformer())
+
+    namespace = dict(**fn.__globals__)
+    exec(tree.code, namespace)
+    debug_fn = namespace[fn.__name__]
+
+    def wrapper(*args, **kwargs):
+        try:
+            return debug_fn(*args, **kwargs)
+        except Exception:
+            # TODO: Namespace issues, need to inherite fn closure
+            return fn(*args, **kwargs)
+    return wrapper

magma/generator.py

@@ -3,9 +3,11 @@
 import functools
 import weakref
 from .circuit import (DefineCircuitKind, Circuit, DebugCircuit,
-                      DebugDefineCircuitKind)
+                      DebugDefineCircuitKind, NamerDict)
 from . import cache_definition
 from magma.common import ParamDict
+from magma.config import config
+from magma.debug_rewriter import debug
 from hwtypes import BitVector
 
 
@@ -70,10 +72,14 @@ def _make_key(cls, *args, **kwargs):
 
 
 def _make_type(cls, *args, **kwargs):
-    dummy = type.__new__(cls, "", (), {})
+    dummy = type.__new__(cls, "", (), {
+        "_namer_dict": NamerDict()
+    })
     name = cls.__name__
     bases = (cls._base_cls_,)
     dct = cls._base_metacls_.__prepare__(name, bases)
+    if config.use_generator_debug_rewriter:
+        cls.__init__ = debug(cls.__init__)
     cls.__init__(dummy, *args, **kwargs)
     dct.update(dict(dummy.__dict__))
     # NOTE(leonardt): We need to override the Generator2 classmethod bind with
@@ -110,7 +116,7 @@ def __call__(cls, *args, **kwargs):
             len(args) == 3
             and type(args[0]) is str
             and type(args[1]) is tuple
-            and type(args[2]) is dict
+            and (type(args[2]) is dict or type(args[2]) is NamerDict)
             and "__module__" in args[2]
         )
         if is_base_cls:
@@ -141,6 +147,11 @@ def __call__(cls, *args, **kwargs):
     def bind(cls, monitor):
         cls.bind_generators.append(monitor)
 
+    def __setattr__(cls, key, value):
+        if config.use_namer_dict:
+            cls._namer_dict[key] = value
+        super().__setattr__(key, value)
+
 
 class _DebugGeneratorMeta(_Generator2Meta):
     _base_cls_ = DebugCircuit