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Port AXI4MLIR into SODA-OPT #6

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Port AXI4MLIR into SODA-OPT #6

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agostini01
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agostini01 and others added 12 commits June 29, 2023 08:24
@agostini01
Implement the Accel dialect
e3d2f2f 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>

The accel dialect is intended to hold accel operations that abstract
AXI4MLIR DMA communciations

The accel dialect has been ported from:
https://github.com/agostini01/llvm-project/tree/axi4mlir-32bit
@agostini01
Implement the Accel dialect
277034b 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>

The accel dialect is intended to hold accel operations that abstract
AXI4MLIR DMA communciations

The accel dialect has been ported from:
https://github.com/agostini01/llvm-project/tree/axi4mlir-32bit
@agostini01 @judeharis
Implement Accel to AXI4MLIR runtime lowering pass
370d9a6 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>
@agostini01
Merge branch 'accel' of github.com:pnnl/soda-opt into accel
a63cd1d
@agostini01 @judeharis
[accel] Implement lib prototype and systemc accelerators for axi4mlir
f8649aa 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>
@agostini01 @judeharis
[accel] Implement AXI DMA library and mlir runner wrappers
85a2727 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>
@agostini01 @judeharis
[accel] Implement lowering and jit tests for mockaxi runtime library
50aa187 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>
@agostini01 @judeharis
[accel] WIP: Implement logic for axi4mlir attributes to accel conversion
97a9929 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>
@agostini01 @judeharis
[accel] WIP: Implement transformation support utils for Linalg to Accel
19cbc68 
Co-authored-by: Jude Haris <j.haris.1@research.gla.ac.uk>
@agostini01
[accel] Rename genenrated target for the SODAAccelDialect
37ea9cb
@agostini01
[accel] Update include file paths
bbe8dbe
@agostini01
Integrate LLVM at: https://github.com/llvm/llvm-project@08d094a0e4573…
f2b1c79 
…60ad8b94b017d2dc277e697ca76
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