Added support for SE301 carrier with SOM1-SOC mezzanine board from SundanceDSP

boards/no_som1soc/Kconfig

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+menu "Custom Board Design Configuration Options"
+
+config SOC_FPGA_DESIGN_XML
+	string "Enter path to Libero XML file"
+	default "boards/no_som1soc/soc_fpga_design/xml/no_som1soc.xml"
+	help
+		This option specifies the design XML file to use.
+endmenu
+

boards/no_som1soc/Makefile

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+#
+# MPFS HSS Embedded Software
+#
+# Copyright 2019-2021 Microchip Corporation.
+#
+# SPDX-License-Identifier: MIT
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to
+# deal in the Software without restriction, including without limitation the
+# rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+# sell copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+# IN THE SOFTWARE.
+#
+#
+# Defines target-specific build-rules variables, extra sources and include paths
+#
+
+$(info ${BOARD} selected)
+
+BINDIR=Default
+TARGET-l2scratch=hss-l2scratch.elf
+TARGET-envm-wrapper=hss-envm-wrapper.elf
+RISCV_TARGET=$(TARGET-l2scratch) $(TARGET-envm-wrapper)
+TARGET:=$(RISCV_TARGET)
+
+LINKER_SCRIPT-l2scratch=boards/${BOARD}/hss-l2scratch.ld
+
+BOARD_DIR=boards/${BOARD}
+
+INCLUDES += \
+	-I$(BOARD_DIR)/mpfs_hal_config/\
+	-I$(BOARD_DIR)/fpga_design_config/\
+	-I$(BOARD_DIR)/ \
+	-Ibaremetal/polarfire-soc-bare-metal-library/src/platform \
+
+EXTRA_SRCS-y += \
+	$(BOARD_DIR)/hss_uart_init.c \
+        $(BOARD_DIR)/uart_device_list.c \
+        $(BOARD_DIR)/hss_board_init.c \
+
+EXTRA_SRCS-$(CONFIG_USE_LOGO) += \
+        $(BOARD_DIR)/hss_logo_init.c
+
+$(BOARD_DIR)/hss_uart_init.o: CFLAGS=$(CFLAGS_GCCEXT)
+
+EXTRA_OBJS-$(CONFIG_SERVICE_BOOT_USE_PAYLOAD) += $(BOARD_DIR)/payload.o
+$(BOARD_DIR)/payload.o: $(BOARD_DIR)/payload.bin
+	$(LD) -r -b binary $< -o $@
+
+################################################################################################
+#
+# Extra hardware dependency rules for QSPI
+#
+
+INCLUDES += \
+	-Ibaremetal/ \
+	-Ibaremetal/drivers/winbond_w25n01gv \
+
+baremetal/drivers/winbond_w25n01gv/winbond_w25n01gv.o: CFLAGS=$(CFLAGS_GCCEXT)
+
+################################################################################################
+#
+# Linker Scripts
+#
+
+$(BOARD_DIR)/hss-l2scratch.ld: $(BOARD_DIR)/hss-l2scratch.lds config.h
+
+################################################################################################
+
+#
+# Extra dependency rules for auto-generated configuration files (from Libero XML)
+#
+
+SOC_CONFIG_FILES =  \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_clk_ddr_pll.h \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_clk_mss_cfm.h \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_clk_mss_pll.h \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_clk_sgmii_cfm.h \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_clk_sgmii_pll.h \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_clk_sysreg.h \
+	$(BOARD_DIR)/fpga_design_config/clocks/hw_mss_clks.h \
+	$(BOARD_DIR)/fpga_design_config/ddr/hw_ddr_io_bank.h \
+	$(BOARD_DIR)/fpga_design_config/ddr/hw_ddr_mode.h \
+	$(BOARD_DIR)/fpga_design_config/ddr/hw_ddr_off_mode.h \
+	$(BOARD_DIR)/fpga_design_config/ddr/hw_ddr_options.h \
+	$(BOARD_DIR)/fpga_design_config/ddr/hw_ddr_segs.h \
+	$(BOARD_DIR)/fpga_design_config/ddr/hw_ddrc.h \
+	$(BOARD_DIR)/fpga_design_config/general/hw_gen_peripherals.h \
+	$(BOARD_DIR)/fpga_design_config/fpga_design_config.h \
+	$(BOARD_DIR)/fpga_design_config/io/hw_hsio_mux.h \
+	$(BOARD_DIR)/fpga_design_config/io/hw_mssio_mux.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_apb_split.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_cache.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_memory.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_crypto.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_fic0.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_fic1.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_fic2.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_gem0.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_gem1.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_mmc.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_scb.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_trace.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_mpu_usb.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_pmp_hart0.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_pmp_hart1.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_pmp_hart2.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_pmp_hart3.h \
+	$(BOARD_DIR)/fpga_design_config/memory_map/hw_pmp_hart4.h \
+	$(BOARD_DIR)/fpga_design_config/sgmii/hw_sgmii_tip.h \
+
+$(info MSS config file is: $(CONFIG_SOC_FPGA_DESIGN_XML))
+
+SOC_FPGA_DESIGN_XML_FILE= $(subst $\",,$(CONFIG_SOC_FPGA_DESIGN_XML))
+ifeq ("$(wildcard $(SOC_FPGA_DESIGN_XML_FILE))", "")
+$(error "XML file $(CONFIG_SOC_FPGA_DESIGN_XML) specified by CONFIG_SOC_FPGA_DESIGN_XML does not exist")
+endif
+
+config.h: $(SOC_CONFIG_FILES)
+$(SOC_CONFIG_FILES): $(SOC_FPGA_DESIGN_XML_FILE)
+	@$(ECHO) " MPFSCFGGEN    $<";
+	$(PYTHON) tools/polarfire-soc-configuration-generator/mpfs_configuration_generator.py $< $(BOARD_DIR)
+
+$(RISCV_TARGET): $(SOC_CONFIG_FILES)

boards/no_som1soc/def_config

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+
+#
+# Board/Design Configuration Options
+#
+
+#
+# Custom Board Design Configuration Options
+#
+CONFIG_SOC_FPGA_DESIGN_XML="boards/no_som1soc/soc_fpga_design/xml/no_som1soc.xml"
+# end of Custom Board Design Configuration Options
+# end of Board/Design Configuration Options
+
+#
+# Services
+#
+CONFIG_SERVICE_BEU=y
+CONFIG_SERVICE_BOOT=y
+
+#
+# Boot Service
+#
+# CONFIG_SERVICE_BOOT_USE_PAYLOAD is not set
+# CONFIG_SERVICE_BOOT_CUSTOM_FLOW is not set
+CONFIG_SERVICE_BOOT_DDR_TARGET_ADDR=0x103FC00000
+# CONFIG_SERVICE_BOOT_MMC_USE_GPT is not set
+# end of Boot Service
+
+CONFIG_SERVICE_DDR=y
+CONFIG_SERVICE_GOTO=y
+# CONFIG_SERVICE_HEALTHMON is not set
+CONFIG_SERVICE_IPI_POLL=y
+CONFIG_SERVICE_MMC=y
+
+#
+# MMC
+#
+
+#
+# MMC Mode
+#
+CONFIG_SERVICE_MMC_MODE_EMMC=y
+# CONFIG_SERVICE_MMC_MODE_SDCARD is not set
+# end of MMC Mode
+
+#
+# MMC Voltage
+#
+# CONFIG_SERVICE_MMC_BUS_VOLTAGE_1V8 is not set
+CONFIG_SERVICE_MMC_BUS_VOLTAGE_3V3=y
+# end of MMC Voltage
+
+#
+# SDIO Control
+#
+# CONFIG_SERVICE_MMC_FABRIC_SD_EMMC_DEMUX_SELECT_PRESENT is not set
+# end of SDIO Control
+
+CONFIG_SERVICE_MMC_SPIN_TIMEOUT=y
+# CONFIG_SERVICE_MMC_SPIN_TIMEOUT_ASSERT is not set
+CONFIG_SERVICE_MMC_SPIN_TIMEOUT_MAX_SPINS=1000000
+# end of MMC
+
+CONFIG_SERVICE_OPENSBI=y
+
+#
+# SBI Extension Support
+#
+CONFIG_SBI_ECALL_TIME=y
+CONFIG_SBI_ECALL_RFENCE=y
+CONFIG_SBI_ECALL_IPI=y
+CONFIG_SBI_ECALL_HSM=y
+CONFIG_SBI_ECALL_SRST=y
+CONFIG_SBI_ECALL_PMU=y
+CONFIG_SBI_ECALL_LEGACY=y
+CONFIG_SBI_ECALL_VENDOR=y
+# end of SBI Extension Support
+
+CONFIG_FDT_IPI=y
+CONFIG_FDT_IPI_MSWI=y
+CONFIG_FDT_IPI_PLICSW=y
+CONFIG_FDT_IRQCHIP=y
+CONFIG_FDT_IRQCHIP_PLIC=y
+CONFIG_FDT_RESET=y
+CONFIG_FDT_SERIAL=y
+CONFIG_FDT_SERIAL_UART8250=y
+CONFIG_FDT_TIMER=y
+CONFIG_FDT_TIMER_MTIMER=y
+# CONFIG_SERVICE_POWERMODE is not set
+# CONFIG_SERVICE_QSPI is not set
+CONFIG_SERVICE_REBOOT=y
+# CONFIG_SERVICE_SCRUB is not set
+CONFIG_SERVICE_SGDMA=y
+# CONFIG_SERVICE_SPI is not set
+CONFIG_SERVICE_TINYCLI=y
+
+#
+# Tiny Command Line Interface
+#
+CONFIG_SERVICE_TINYCLI_TIMEOUT=2
+# CONFIG_SERVICE_TINYCLI_REGISTER is not set
+# CONFIG_SERVICE_TINYCLI_ENABLE_PREBOOT_TIMEOUT is not set
+# end of Tiny Command Line Interface
+
+# CONFIG_SERVICE_UART is not set
+CONFIG_SERVICE_USBDMSC=y
+
+#
+# USB Device Mass Storage Class
+#
+CONFIG_SERVICE_USBDMSC_REGISTER=y
+# CONFIG_SERVICE_USBDMSC_ENABLE_MAX_SESSION_TIMEOUT is not set
+# end of USB Device Mass Storage Class
+
+CONFIG_SERVICE_WDOG=y
+
+#
+# Watchdog Service
+#
+# CONFIG_SERVICE_WDOG_DEBUG is not set
+CONFIG_SERVICE_WDOG_DEBUG_TIMEOUT_SEC=240
+CONFIG_SERVICE_WDOG_ENABLE_E51=y
+# end of Watchdog Service
+
+CONFIG_SERVICE_YMODEM=y
+# end of Services
+
+#
+# General Configuration Options
+#
+
+#
+# Miscellaneous
+#
+# CONFIG_USE_PCIE is not set
+# CONFIG_UART_SURRENDER is not set
+CONFIG_OPENSBI=y
+# CONFIG_USE_IHC is not set
+
+#
+# Serial Port
+#
+CONFIG_UART_POST_BOOT=0
+# end of Serial Port
+
+#
+# Tamper
+#
+# CONFIG_USE_TAMPER is not set
+# end of Tamper
+
+CONFIG_ALLOW_COLDREBOOT=y
+
+#
+# Cold Reboot
+#
+CONFIG_ALLOW_COLDREBOOT_ALWAYS=y
+# CONFIG_COLDREBOOT_TRY_AUTO_UPDATE is not set
+# CONFIG_ALLOW_COLDREBOOT_ON_OPENSBI_FAULT is not set
+# end of Cold Reboot
+# end of Miscellaneous
+
+#
+# OpenSBI
+#
+# CONFIG_PROVIDE_DTB is not set
+# end of OpenSBI
+
+#
+# Memory Options
+#
+# CONFIG_SKIP_DDR is not set
+ #CONFIG_MEMTEST is not set
+# CONFIG_USE_PDMA is not set
+# CONFIG_INITIALIZE_MEMORIES is not set
+# end of Memory Options
+# end of General Configuration Options
+
+#
+# Build Options
+#
+# CONFIG_COLOR_OUTPUT is not set
+# CONFIG_USE_LOGO is not set
+
+#
+# Logo
+#
+# end of Logo
+
+# CONFIG_CC_STACKPROTECTOR_STRONG is not set
+# CONFIG_CC_DUMP_STACKSIZE is not set
+# CONFIG_LD_RELAX is not set
+# CONFIG_CC_USE_MAKEDEP is not set
+# CONFIG_CC_USE_GNU_BUILD_ID is not set
+CONFIG_CC_HAS_INTTYPES=y
+CONFIG_DISPLAY_TOOL_VERSIONS=y
+# CONFIG_LOG_FUNCTION_NAMES is not set
+# end of Build Options
+
+#
+# Compression
+#
+CONFIG_COMPRESSION=y
+CONFIG_COMPRESSION_MINIZ=y
+# end of Compression
+
+#
+# Crypto
+#
+# CONFIG_CRYPTO_SIGNING is not set
+# end of Crypto
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG_LOG_STATE_TRANSITIONS is not set
+# CONFIG_DEBUG_LOOP_TIMES is not set
+# CONFIG_DEBUG_IPI_STATS is not set
+# CONFIG_DEBUG_CHUNK_DOWNLOADS is not set
+# CONFIG_DEBUG_MSCGEN_IPI is not set
+# CONFIG_DEBUG_PERF_CTRS is not set
+# CONFIG_DEBUG_RESET_REASON is not set
+# end of Debug Options
+
+#
+# SSMB Options
+#
+CONFIG_IPI_MAX_NUM_QUEUE_MESSAGES=8
+# CONFIG_IPI_FIXED_BASE is not set
+# end of SSMB Options