Additional configuration fixes

Update the clocks and resets used by the streaming demo to point to the update clock configuration used by the design. Re-add the AXI stream demo argument as this was accidentally removed in a previous commit
polarfire-soc · May 24, 2022 · 80e9d17 · 80e9d17
1 parent f3699e3
commit 80e9d17
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Showing 4 changed files with 21 additions and 13 deletions.
diff --git a/MPFS_ICICLE_KIT_REFERENCE_DESIGN.tcl b/MPFS_ICICLE_KIT_REFERENCE_DESIGN.tcl
@@ -220,6 +220,14 @@ if {[info exists BFM_SIMULATION]} {
     source script_support/simulation/Test_bench.tcl
 }
 
+if {[info exists AXI4_STREAM_DEMO]} {
+    if {[info exists BFM_SIMULATION]} {
+        source script_support/additional_configurations/AXI4_STREAM_DATA_GENERATOR/AXI4_STREAM_DATA_GENERATOR_BFM.tcl    
+    } else {
+        source script_support/additional_configurations/AXI4_STREAM_DATA_GENERATOR/AXI4_STREAM_DATA_GENERATOR.tcl    
+    }
+}
+
 if {[info exists I2C_LOOPBACK]} {
     if {[file isdirectory $local_dir/script_support/components/MSS_I2C_LOOPBACK]} {
         file delete -force $local_dir/script_support/components/MSS_I2C_LOOPBACK

diff --git a/...pport/additional_configurations/AXI4_STREAM_DATA_GENERATOR/AXI4_STREAM_DATA_GENERATOR.tcl b/...pport/additional_configurations/AXI4_STREAM_DATA_GENERATOR/AXI4_STREAM_DATA_GENERATOR.tcl
@@ -47,12 +47,12 @@ sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"DMA_CONTROLL
 sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"DMA_CONTROLLER:TDEST" "AXI4_STREAM_DATA_GENERATOR_0:TDEST"} 
 
 #   connecting ACLK and reset
-sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"CLOCKS_AND_RESETS:CLK_125MHz" "AXI4_STREAM_DATA_GENERATOR_0:ACLK"} 
-sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"CLOCKS_AND_RESETS:RESETN_CLK_125MHz" "AXI4_STREAM_DATA_GENERATOR_0:RSTN"} 
+sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"DMA_CONTROLLER:CLOCK" "AXI4_STREAM_DATA_GENERATOR_0:ACLK"} 
+sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"DMA_CONTROLLER:RESETN" "AXI4_STREAM_DATA_GENERATOR_0:RSTN"} 
 
 #	connecting the PCLK and PRESET_n
-sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"CLOCKS_AND_RESETS:CLK_62_5MHz" "AXI4_STREAM_DATA_GENERATOR_0:PCLK"} 
-sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"CLOCKS_AND_RESETS:RESETN_CLK_62_5MHz" "AXI4_STREAM_DATA_GENERATOR_0:PRESETN"} 
+sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"CLOCKS_AND_RESETS:FIC_3_CLK" "AXI4_STREAM_DATA_GENERATOR_0:PCLK"} 
+sd_connect_pins -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} -pin_names {"CLOCKS_AND_RESETS:RESETN_FIC_3_CLK" "AXI4_STREAM_DATA_GENERATOR_0:PRESETN"} 
 save_smartdesign -sd_name {MPFS_ICICLE_KIT_BASE_DESIGN} 
 generate_component -component_name {MPFS_ICICLE_KIT_BASE_DESIGN} -recursive 0 
 build_design_hierarchy
diff --git a/...t/additional_configurations/AXI4_STREAM_DATA_GENERATOR/AXI4_STREAM_DATA_GENERATOR_BFM.tcl b/...t/additional_configurations/AXI4_STREAM_DATA_GENERATOR/AXI4_STREAM_DATA_GENERATOR_BFM.tcl
diff --git a/script_support/simulation/Test_bench.tcl b/script_support/simulation/Test_bench.tcl
@@ -9,7 +9,6 @@ create_and_configure_core -core_vlnv {Actel:Simulation:RESET_GEN:1.0.1} -compone
 sd_instantiate_component -sd_name ${sd_tb_name} -component_name {RESET_GEN_C0} -instance_name {} 
 
 # Make connections
-sd_connect_pins -sd_name ${sd_tb_name} -pin_names {"RESET_GEN_C0_0:RESET" "MPFS_ICICLE_KIT_BASE_DESIGN_0:PCIE_1_PERST_N"} 
 sd_connect_pins -sd_name ${sd_tb_name} -pin_names {"RESET_GEN_C0_0:RESET" "MPFS_ICICLE_KIT_BASE_DESIGN_0:SW4"} 
 sd_connect_pins -sd_name ${sd_tb_name} -pin_names {"CLK_GEN_C0_0:CLK" "MPFS_ICICLE_KIT_BASE_DESIGN_0:REFCLK"} 
 sd_connect_pins -sd_name ${sd_tb_name} -pin_names {"CLK_GEN_C0_0:CLK" "MPFS_ICICLE_KIT_BASE_DESIGN_0:REFCLK_N"} 
@@ -159,6 +158,7 @@ sd_mark_pins_unused -sd_name ${sd_tb_name} -pin_names {MPFS_ICICLE_KIT_BASE_DESI
 sd_mark_pins_unused -sd_name {Test_bench} -pin_names {MPFS_ICICLE_KIT_BASE_DESIGN_0:COREUART_TX}
 sd_mark_pins_unused -sd_name {Test_bench} -pin_names {MPFS_ICICLE_KIT_BASE_DESIGN_0:mBUS_PWM} 
 sd_mark_pins_unused -sd_name {Test_bench} -pin_names {MPFS_ICICLE_KIT_BASE_DESIGN_0:SPI_1_DO} 
+sd_mark_pins_unused -sd_name {Test_bench} -pin_names {MPFS_ICICLE_KIT_BASE_DESIGN_0:PCIE_1_PERST_N} 
 sd_connect_pins_to_constant -sd_name ${sd_tb_name} -pin_names {MPFS_ICICLE_KIT_BASE_DESIGN_0:SD_CD_EMMC_STRB} -value {GND} 
 sd_connect_pins_to_constant -sd_name ${sd_tb_name} -pin_names {MPFS_ICICLE_KIT_BASE_DESIGN_0:SD_WP_EMMC_RSTN} -value {GND}