Merge branch 'develop' into feature/add-fabric-sram

Readme.md

@@ -1,7 +1,7 @@
 # PolarFire SoC Icicle Kit Sample Design scripts Libero v12.5
 
 ## Using the scripts
-1. Clone the repository - note the path to this repository can not contain any spaces
+1. Clone the repository - note the path to this repository must not contain any spaces
 2. Open Libero v12.5
 3. Open the execute script dialog (CTRL + U)
 4. Execute the script for the design required (e.g "ICICLE_KIT_eMMC.tcl") - there are no arguments
@@ -12,15 +12,21 @@
 The scripts will automatically import IO constraints and generate timing constraints for the design. The flow can be run by double clicking on a stage in the design flow - selecting an option requiring previous steps to be completed will run the full flow, i.e double clicking "Run Program Action" will run synthesis, place and route, etc and then program the device.
 
 ## MSS Configuration
-The Microprocessor Subsystem (MSS) is configured using a tool called the PolarFire SoC MSS Configurator, it takes user inputs and generates an XML configuration file which is used by the [PolarFire SoC Configuration Generator](https://github.com/polarfire-soc/polarfire-soc-configuration-generator) to generate header files for bare metal applications which provide configuration values to the MSS on system boot along with a Libero component which can be imported into the FPGA design flow.
-A configuration file for the PolarFire SoC MSS Configurator is available for both configurations in the "script_support" folder.
+The Microprocessor Subsystem (MSS) is configured using the PolarFire SoC MSS Configurator. 
+This software tool takes user inputs and generates an MSS configuration file (.xml) along with an MSS component file (.cxz). 
+The XML file is used by the PolarFire SoC Configuration Generator to generate configuration header files for bare metal applications. 
+The MSS component file can be imported into a Libero design and used in the FPGA design flow.
+
+A saved configuration for the PolarFire SoC MSS Configurator is available for both the eMMC and SD card designs in the "script_support" folder. These configurations will match the MSS configuration used in the design and can be used to regenerate XML and a Libero component.
 
 ## XML
-The FPGA design's configuration, including Microprocessor Subsystem (MSS), is captured in XML files that are then used in the software development flow to generate configuration header files. These header files are compiled as part of the system's startup code or zero stage boot loader to configure the system.
-XML generated by both of the configurations provided here is avaialable in the "XML" folder.
+The Microprocessor Subsystem (MSS) configuration is captured in an XML file that is then used by the PolarFire SoC Configuration Generator to generate configuration header files. These header files are compiled as part of the MPFS HAL startup code to configure the system on startup.
+
+XML generated by both of the configurations provided is available in the "XML" folder.
 
 ## Programming the eNVM and setting the boot mode
 If the eNVM is to be used (for example to store the HSS) it can be programmed using SoftConsole v6.4 or later. 
+
 Build the bare metal application using the reference XML provided (XML will also be generated in the script_support/components/[target] folder when an MSS component is generated as part of the flow) and run the "PolarFire SoC program non secure boot mode 1" external tool in SoftConsole.
 
 ## Board configuration