Merged mss-spi source code version 2.1.101.

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/drivers/mss/mss_mmuart/mss_uart.c

@@ -1,15 +1,15 @@
 /*******************************************************************************
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019-2022 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  * 
  * PolarFire SoC Microprocessor Subsystem MMUART bare metal software driver
  * implementation.
  *
  */
-#include <drivers/mss/mss_mmuart/mss_uart.h>
-#include <drivers/mss/mss_mmuart/mss_uart_regs.h>
 #include "mpfs_hal/mss_hal.h"
+#include "mss_uart_regs.h"
+#include "mss_uart.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -62,6 +62,7 @@ static uint32_t g_uart_axi_pos = 0x0u;
 #define FCR_TRIG_LEVEL_MASK             0xC0u
 
 #define IIRF_MASK                       0x0Fu
+#define IER_MASK                        0x0Du
 
 #define INVALID_INTERRUPT               0u
 #define INVALID_IRQ_HANDLER             ((mss_uart_irq_handler_t) 0)
@@ -439,7 +440,7 @@ MSS_UART_enable_irq
 {
     ASSERT(MSS_UART_INVALID_IRQ > irq_mask);
 
-    enable_irq(this_uart);
+
 
     if (MSS_UART_INVALID_IRQ > irq_mask)
     {
@@ -448,10 +449,13 @@ MSS_UART_enable_irq
          * bit 1 - Transmitter Holding  Register Empty Interrupt
          * bit 2 - Receiver Line Status Interrupt
          * bit 3 - Modem Status Interrupt
+         * 
+         * The use of the IER_MASK macro is to prevent the THRE to be
+         * set at this point of the design flow and to lead to a break
+         * later on.
          */
         this_uart->hw_reg->IER |= ((uint8_t)(((uint32_t)irq_mask &
-                                                         (uint32_t)IIRF_MASK)));
-
+                                                         (uint32_t)IER_MASK)));
 
         /* 
          * bit 4 - Receiver time-out interrupt
@@ -1650,7 +1654,7 @@ uart_isr
             }
 
             /* NACK interrupt */
-            if (this_uart->hw_reg->IIM &ENACKI)
+            if (this_uart->hw_reg->IIM & ENACKI_MASK)
             {
                 ASSERT(NULL_HANDLER != this_uart->nack_handler);
 
@@ -1661,7 +1665,7 @@ uart_isr
             }
 
             /* PID parity error interrupt */
-            if (this_uart->hw_reg->IIM & EPID_PEI)
+            if (this_uart->hw_reg->IIM & EPID_PEI_MASK)
             {
                 ASSERT(NULL_HANDLER != this_uart->pid_pei_handler);
 
@@ -1672,7 +1676,7 @@ uart_isr
             }
 
             /* LIN break detection interrupt */
-            if (this_uart->hw_reg->IIM & ELINBI)
+            if (this_uart->hw_reg->IIM & ELINBI_MASK)
             {
                 ASSERT(NULL_HANDLER != this_uart->break_handler);
 
@@ -1683,7 +1687,7 @@ uart_isr
             }
 
             /* LIN Sync detection interrupt */
-            if (this_uart->hw_reg->IIM & ELINSI)
+            if (this_uart->hw_reg->IIM & ELINSI_MASK)
             {
                 ASSERT(NULL_HANDLER != this_uart->sync_handler);
 

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/drivers/mss/mss_mmuart/mss_uart.h

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019-2023 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -1573,6 +1573,10 @@ MSS_UART_get_rx
   Note:     You can disable the RDA interrupt when required by calling the 
   MSS_UART_disable_irq() function. This is your choice and is dependent upon
   your application.
+
+  Note:     The trigger level is actually applied only if the this_uart is set 
+  to ready mode 1. See the MSS_UART_set_ready_mode() function for more 
+  information.
   
   @param this_uart
     The this_uart parameter is a pointer to an mss_uart_instance_t
@@ -1685,17 +1689,17 @@ MSS_UART_set_loopback
 
 /***************************************************************************//**
   The MSS_UART_enable_irq() function enables the MSS UART interrupts specified
-  by the irq_mask parameter. The irq_mask parameter identifies the MSS UART
-  interrupts by bit position, as defined in the interrupt enable register (IER)
-  of MSS UART. The MSS UART interrupts and their identifying irq_mask bit
-  positions are as follows:
-  When an irq_mask bit position is set to 1, this function enables the
-  corresponding MSS UART interrupt in the IER register. When an irq_mask bit
-  position is set to 0, the state of the corresponding interrupt remains 
-  unchanged in the IER register.
-  
-  Note: The MSS_UART_enable_irq() function also enables the MSS UART instance
-        interrupt in the PolarFire SoC Core Complex PLIC.
+  by the irq_mask parameter. The irq_mask parameter identifies the MSS UART 
+  interrupts by bit position, as defined in the interrupt enable register (IER) 
+  of MSS UART. The MSS UART interrupts and their identifying irq_mask bit 
+  positions are as follows: When an irq_mask bit position is set to 1, this 
+  function enables the corresponding MSS UART interrupt in the IER register.
+
+  Note: the Transmit Buffer Empty interrupt is not enabled in this API. Indeed, 
+  enabling it here leads to an interrupt occuring before any data is passed to 
+  the UART, causing a crash. The TBE bit in the IER register is set 
+  in the MSS_UART_irq_tx() function, that actually starts the transmission.
+
         
   @param this_uart
     The this_uart parameter is a pointer to an mss_uart_instance_t
@@ -1732,12 +1736,17 @@ MSS_UART_set_loopback
       int main(void)
       {
          uint8_t tx_buff[10] = "abcdefghi";
+         uint32_t interrupt_priority = 4;
 
+         enable_interrupts();
+         (void) mss_config_clk_rst(MSS_PERIPH_MMUART0, (uint8_t) 1, PERIPHERAL_ON);
          MSS_UART_init(&g_mss_uart0_lo,
-                  MSS_UART_57600_BAUD,
-                  MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT);
-
-         MSS_UART_enable_irq(&g_mss_uart0_lo,(MSS_UART_RBF_IRQ | MSS_UART_TBE_IRQ));
+                   MSS_UART_57600_BAUD,
+                   MSS_UART_DATA_8_BITS | MSS_UART_NO_PARITY | MSS_UART_ONE_STOP_BIT);
+         PLIC_init();
+         MSS_UART_enable_irq(&g_mss_uart0_lo, (MSS_UART_RBF_IRQ | MSS_UART_TBE_IRQ));
+         PLIC_SetPriority(MMUART0_PLIC_77, interrupt_priority);
+         PLIC_SetPriority_Threshold(0);
 
          return(0);
       }
@@ -3188,7 +3197,8 @@ MSS_UART_set_address
 /***************************************************************************//**
   The MSS_UART_set_ready_mode() function is used to configure the MODE0 or MODE1 
   to the TXRDY and RXRDY signals of the MSS UART referenced by this_uart 
-  parameter. The mode parameter is used to provide the mode to be configured.
+  parameter. The mode parameter is used to provide the mode to be configured. 
+  See below for MODE0 and MODE1 description.
 
   @param this_uart
     The this_uart parameter is a pointer to an mss_uart_instance_t
@@ -3204,6 +3214,12 @@ MSS_UART_set_address
   @param mode
     The mode parameter is the mss_uart_ready_mode_t type which is used to 
     configure the TXRDY and RXRDY signal modes.
+    MODE0: RXRDY will go high active when there is at least one character 
+    in the RX FIFO (i.e. the RDA is triggered when there is at least one 
+    character in the RX FIFO). TXRDY will go inactive after the first 
+    character is loaded in the TX FIFO.
+    MODE1: RXRDY will go active high when the trigger level or the timeout is 
+    reached. TXRDY will go inactive when the TX FIFO is completely full.
 
   @return
     This function does not return a value.

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/drivers/mss/mss_mmuart/mss_uart_regs.h

@@ -1,5 +1,5 @@
  /*******************************************************************************
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019-2022 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  * 

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/drivers/mss/mss_spi/mss_spi.c

@@ -1,5 +1,5 @@
 /***************************************************************************//**
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019-2023 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  * 
@@ -133,7 +133,8 @@ void MSS_SPI_init
 {
     uint16_t slave;
 
-    ASSERT((this_spi == &g_mss_spi0_lo) || (this_spi == &g_mss_spi1_lo));
+ASSERT((this_spi == &g_mss_spi0_lo) || (this_spi == &g_mss_spi0_hi) 
+        || (this_spi == &g_mss_spi1_lo) || (this_spi == &g_mss_spi1_hi));
 
     /* Initialize SPI driver instance data. Relies on the majority
      * of data requiring 0 for initial state so we just need to fill

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/drivers/mss/mss_spi/mss_spi.h

@@ -1,5 +1,5 @@
 /*******************************************************************************
- * Copyright 2019-2020 Microchip FPGA Embedded Systems Solutions.
+ * Copyright 2019-2023 Microchip FPGA Embedded Systems Solutions.
  *
  * SPDX-License-Identifier: MIT
  *

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/mpfs_hal/common/bits.h

@@ -39,11 +39,11 @@ extern "C" {
 #define unlikely(x) __builtin_expect((x), 0)
 
 #ifndef ROUNDUP
-#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
+#    define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
 #endif
 
 #ifndef ROUNDDOWN
-#define ROUNDDOWN(a, b) ((a)/(b)*(b))
+#    define ROUNDDOWN(a, b) ((a)/(b)*(b))
 #endif
 
 #define MAX(a, b) ((a) > (b) ? (a) : (b))

driver-examples/mss/mss-spi/mpfs-spi-flash/src/platform/mpfs_hal/common/mss_beu.c

@@ -0,0 +1,87 @@
+/*******************************************************************************
+ * Copyright 2019-2022 Microchip FPGA Embedded Systems Solutions.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * MPFS HAL Embedded Software
+ *
+ */
+/*******************************************************************************
+ * @file mss_beu.c
+ * @author Microchip-FPGA Embedded Systems Solutions
+ * @brief PolarFire SoC MSS MPU driver for configuring the Bus Error Unit
+ *
+ */
+/*=========================================================================*//**
+
+ *//*=========================================================================*/
+#include <stdio.h>
+#include <string.h>
+#include "mpfs_hal/mss_hal.h"
+
+/**
+ * \brief BEU user configuration for BEU enables
+ *
+ */
+const uint64_t    beu_enable[] = {
+    LIBERO_SETTING_BEU_ENABLE_HART0,
+    LIBERO_SETTING_BEU_ENABLE_HART1,
+    LIBERO_SETTING_BEU_ENABLE_HART2,
+    LIBERO_SETTING_BEU_ENABLE_HART3,
+    LIBERO_SETTING_BEU_ENABLE_HART4
+};
+
+/**
+ * \brief BEU user configuration for BEU PLIC enables
+ *
+ */
+const uint64_t    beu_plic_enable[] = {
+    LIBERO_SETTING_BEU_PLIC_ENABLE_HART0,
+    LIBERO_SETTING_BEU_PLIC_ENABLE_HART1,
+    LIBERO_SETTING_BEU_PLIC_ENABLE_HART2,
+    LIBERO_SETTING_BEU_PLIC_ENABLE_HART3,
+    LIBERO_SETTING_BEU_PLIC_ENABLE_HART4
+};
+
+/**
+ * \brief BEU user configuration for BEU local interrupt enables
+ *
+ */
+const uint64_t    beu_local_enable[] = {
+    LIBERO_SETTING_BEU_LOCAL_ENABLE_HART0,
+    LIBERO_SETTING_BEU_LOCAL_ENABLE_HART1,
+    LIBERO_SETTING_BEU_LOCAL_ENABLE_HART2,
+    LIBERO_SETTING_BEU_LOCAL_ENABLE_HART3,
+    LIBERO_SETTING_BEU_LOCAL_ENABLE_HART4
+};
+
+
+/**
+ * This function is configured by editing parameters in
+ * mss_sw_config.h as required.
+ * @return
+ */
+__attribute__((weak)) uint8_t init_bus_error_unit(void)
+{
+   uint8_t hart_id;
+   /* Init BEU in all harts - enable local interrupt */
+   for(hart_id = MPFS_HAL_FIRST_HART; hart_id <= MPFS_HAL_LAST_HART; hart_id++)
+   {
+       BEU->regs[hart_id].ENABLE      = beu_enable[hart_id];
+       BEU->regs[hart_id].PLIC_INT    = beu_plic_enable[hart_id];
+       BEU->regs[hart_id].LOCAL_INT   = beu_local_enable[hart_id];
+       BEU->regs[hart_id].CAUSE       = 0ULL;
+       BEU->regs[hart_id].ACCRUED     = 0ULL;
+       BEU->regs[hart_id].VALUE       = 0ULL;
+   }
+   return (0U);
+}
+
+/**
+ * This interrupt is called if BEU->regs[hart_id].LOCAL_INT's is enabled.
+ * If using, instantiate in your code, and add handling of errors as required.
+ */
+__attribute__((weak)) void handle_local_beu_interrupt(void)
+{
+}
+