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Removing unnecessary math and traits modules.
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rwl committed Aug 13, 2024
1 parent c3c7e75 commit 181f4a1
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Showing 7 changed files with 12 additions and 70 deletions.
5 changes: 2 additions & 3 deletions src/d_imis_dv.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
use crate::math::J;
use num_complex::Complex64;
use sparsetools::coo::Coo;
use sparsetools::csr::CSR;
Expand Down Expand Up @@ -35,7 +34,7 @@ pub fn d_imis_dv(
)?
.to_csr();
let d_imis_dvr = y_bus + &diag_sv2c;
let d_imis_dvi = J * (y_bus - diag_sv2c);
let d_imis_dvi = Complex64::i() * (y_bus - diag_sv2c);

(d_imis_dvr, d_imis_dvi)
} else {
Expand All @@ -62,7 +61,7 @@ pub fn d_imis_dv(
// let diag_v_norm = CSR::with_diag((v / v.norm()).to_vec());
let diag_v_norm = CSR::with_diagonal(v_norm);

let d_imis_dva = J * (y_bus * diag_v - diag_ibus);
let d_imis_dva = Complex64::i() * (y_bus * diag_v - diag_ibus);
let d_imis_dvm = y_bus * diag_v_norm + diag_ibus_vm; // dImis/dVm

(d_imis_dva, d_imis_dvm)
Expand Down
1 change: 0 additions & 1 deletion src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,6 @@ mod zip;

pub mod debug;
mod jac;
pub mod math;
pub mod total_load;

pub use bus_types::*;
Expand Down
43 changes: 0 additions & 43 deletions src/math.rs

This file was deleted.

12 changes: 5 additions & 7 deletions src/sbus.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,3 @@
use crate::cmplx;
use crate::math::J;
use caseformat::{Bus, Gen};
use num_complex::Complex64;
use sparsetools::csr::{CCSR, CSR};
Expand Down Expand Up @@ -95,9 +93,9 @@ pub fn make_sbus(
.filter(|b| b.pd != 0.0 || b.qd != 0.0)
.for_each(|b| {
// Compute per-bus loads in p.u.
let sd_z = cmplx!(b.pd * pw[2], b.qd * qw[2]) / base_mva;
let sd_i = cmplx!(b.pd * pw[1], b.qd * qw[1]) / base_mva;
let sd_p = cmplx!(b.pd * pw[0], b.qd * qw[0]) / base_mva;
let sd_z = Complex64::new(b.pd * pw[2], b.qd * qw[2]) / base_mva;
let sd_i = Complex64::new(b.pd * pw[1], b.qd * qw[1]) / base_mva;
let sd_p = Complex64::new(b.pd * pw[0], b.qd * qw[0]) / base_mva;

let vm_i = match vm {
Some(vm) => Complex64::new(vm[b.bus_i], 0.0),
Expand Down Expand Up @@ -131,7 +129,7 @@ pub fn d_sbus_d_v(
// dSbus/dVi = 1j * (conj(diagIbus) - diagV * conj(Ybus))

let d_sbus_d_vr = diag_i_bus.conj() + &diag_v * y_bus.conj();
let d_sbus_d_vi = (diag_i_bus.conj() - &diag_v * y_bus.conj()) * J;
let d_sbus_d_vi = (diag_i_bus.conj() - &diag_v * y_bus.conj()) * Complex64::i();

(d_sbus_d_vr, d_sbus_d_vi)
} else {
Expand All @@ -144,7 +142,7 @@ pub fn d_sbus_d_v(
// dSbus/dVa = 1j * diagV * conj(diagIbus - Ybus * diagV)
// dSbus/dVm = diagV * conj(Ybus * diagVnorm) + conj(diagIbus) * diagVnorm

let mut d_sbus_d_va = &diag_v * (&diag_i_bus - y_bus * &diag_v).conj() * J;
let mut d_sbus_d_va = &diag_v * (&diag_i_bus - y_bus * &diag_v).conj() * Complex64::i();
let d_sbus_d_vm =
&diag_v * (y_bus * &diag_v_norm).conj() + diag_i_bus.conj() * &diag_v_norm;

Expand Down
3 changes: 1 addition & 2 deletions src/total_load.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
use crate::cmplx;
use crate::zip::make_sdzip;
use caseformat::{Bus, Gen};
use num_complex::Complex64;
Expand Down Expand Up @@ -85,7 +84,7 @@ pub fn total_load(
let (p_df, q_df) = if want_fixed {
let (sd_z, sd_i, sd_p) = make_sdzip(1.0, bus, pw, qw);

let vm: Vec<Complex64> = bus.iter().map(|b| cmplx!(b.vm)).collect();
let vm: Vec<Complex64> = bus.iter().map(|b| Complex64::new(b.vm, 0.0)).collect();

// let s_bus_d = &sd_p + &sd_i * &vm + &sd_z * &(&vm * &vm);
let s_bus_d = (0..nb)
Expand Down
9 changes: 0 additions & 9 deletions src/traits.rs

This file was deleted.

9 changes: 4 additions & 5 deletions src/zip.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,3 @@
use crate::cmplx;
use caseformat::Bus;
use num_complex::Complex64;

Expand All @@ -17,15 +16,15 @@ pub fn make_sdzip(
let pw = pw.unwrap_or([1.0, 0.0, 0.0]);
let qw = qw.unwrap_or(pw);

let base_mva = cmplx!(base_mva);
let base_mva = Complex64::new(base_mva, 0.0);

let mut sd_z = Vec::with_capacity(bus.len());
let mut sd_i = Vec::with_capacity(bus.len());
let mut sd_p = Vec::with_capacity(bus.len());
for b in bus {
sd_z.push(cmplx!(b.pd * pw[2], b.qd * qw[2]) / base_mva);
sd_i.push(cmplx!(b.pd * pw[1], b.qd * qw[1]) / base_mva);
sd_p.push(cmplx!(b.pd * pw[0], b.qd * qw[0]) / base_mva);
sd_z.push(Complex64::new(b.pd * pw[2], b.qd * qw[2]) / base_mva);
sd_i.push(Complex64::new(b.pd * pw[1], b.qd * qw[1]) / base_mva);
sd_p.push(Complex64::new(b.pd * pw[0], b.qd * qw[0]) / base_mva);
}
(sd_z, sd_i, sd_p)
}

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