Hardware Design And Modelling

The verilog codes are writen with gedit on Ubuntu using the following commands in terminal:

Open gedit

gedit module.v

Compilation

1. For separate module and testbench files

iverilog -o testbench_tb.vvp testbench_tb.v

2. For a single file

iverilog -Wall module.v
unbuffer vvp a.out

Generate Waveform

.vvp can be generated in Ubuntu using the following command:

vvp testbench_tb.vvp

Open GTKWave

gtkwave dumpfile.vcd

Alternatively, GTKWave can be opened by simply clicking on the dumpfile.vcd file created in your workspace folder after the previous command.