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Add missing conditions
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Hagb committed Apr 14, 2024
1 parent 9814aef commit 2ce1d04
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Showing 2 changed files with 6 additions and 3 deletions.
6 changes: 4 additions & 2 deletions src/dynarec/dynarec_arm_d8.c
Original file line number Diff line number Diff line change
Expand Up @@ -74,13 +74,15 @@ uintptr_t dynarecD8(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
INST_NAME("FMUL ST0, STx");
v1 = x87_get_st(dyn, ninst, x1, x2, 0, X87_COMBINE(0, nextop&7));
v2 = x87_get_st(dyn, ninst, x1, x2, nextop&7, X87_COMBINE(0, nextop&7));
u8 = x87_setround(dyn, ninst, x1, x2, x14);
if(!box86_dynarec_fastround)
u8 = x87_setround(dyn, ninst, x1, x2, x14);
if(ST_IS_F(0)) {
VMUL_F32(v1, v1, v2);
} else {
VMUL_F64(v1, v1, v2);
}
x87_restoreround(dyn, ninst, u8);
if(!box86_dynarec_fastround)
x87_restoreround(dyn, ninst, u8);
break;
case 0xD0:
case 0xD1:
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3 changes: 2 additions & 1 deletion src/dynarec/dynarec_arm_d9.c
Original file line number Diff line number Diff line change
Expand Up @@ -316,7 +316,8 @@ uintptr_t dynarecD9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
MOV32(x2, (&d_ln2));
VLDR_64(0, x2, 0);
VMUL_F64(0, 0, v1);
x87_setround(dyn, ninst, x1, x2, -1);
if(!box86_dynarec_fastround)
x87_setround(dyn, ninst, x1, x2, -1);
CALL_1D(expm1, box86_dynarec_fastround ? 0 : (1 << x14)); // return is d0
VMOV_64(v1, 0);
}
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