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requires pulp-platform/iDMA#47 not funtional due to pulp-platform/iDMA#48
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| // Copyright 2024 ETH Zurich and University of Bologna. | ||
| // Solderpad Hardware License, Version 0.51, see LICENSE for details. | ||
| // SPDX-License-Identifier: SHL-0.51 | ||
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| // Authors: | ||
| // - Michael Rogenmoser <michaero@iis.ee.ethz.ch> | ||
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| `include "idma/typedef.svh" | ||
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| module safety_island_dma import safety_island_pkg::*; #( | ||
| // parameter safety_island_cfg_t SafetyIslandCfg = safety_island_pkg::SafetyIslandDefaultConfig, | ||
| parameter type reg_req_t = logic, | ||
| parameter type reg_rsp_t = logic, | ||
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| /// OBI Request and Response channel type | ||
| parameter obi_pkg::obi_cfg_t ObiCfg = obi_pkg::ObiDefaultConfig, | ||
| parameter type obi_a_chan_t = logic, | ||
| parameter type obi_req_t = logic, | ||
| parameter type obi_rsp_t = logic | ||
| ) ( | ||
| input logic clk_i, | ||
| input logic rst_ni, | ||
| input logic test_mode_i, | ||
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| /// Register configuration ports | ||
| input reg_req_t reg_req_i, | ||
| output reg_rsp_t reg_rsp_o, | ||
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| // OBI ports | ||
| output obi_req_t [1:0] obi_req_o, | ||
| input obi_rsp_t [1:0] obi_rsp_i | ||
| ); | ||
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| localparam int unsigned TFLenWidth = 24; | ||
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| `IDMA_TYPEDEF_FULL_REQ_T(idma_req_t, logic[ObiCfg.IdWidth-1:0], logic[ObiCfg.AddrWidth-1:0], logic[TFLenWidth-1:0]) | ||
| `IDMA_TYPEDEF_FULL_RSP_T(idma_rsp_t, logic[ObiCfg.AddrWidth-1:0]) | ||
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| typedef struct packed { | ||
| obi_a_chan_t a_chan; | ||
| logic [0:0] padding; | ||
| } obi_read_a_chan_padded_t; | ||
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| typedef union packed { | ||
| obi_read_a_chan_padded_t obi; | ||
| } read_meta_channel_t; | ||
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| typedef struct packed { | ||
| obi_a_chan_t a_chan; | ||
| logic [0:0] padding; | ||
| } obi_write_a_chan_padded_t; | ||
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| typedef union packed { | ||
| obi_write_a_chan_padded_t obi; | ||
| } write_meta_channel_t; | ||
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| idma_req_t backend_req; | ||
| idma_rsp_t backend_rsp; | ||
| logic backend_req_valid, | ||
| backend_req_ready, | ||
| backend_rsp_valid, | ||
| backend_rsp_ready; | ||
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| logic backend_busy; | ||
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| logic [31:0] next_id, completed_id; | ||
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| // reg_frontend | ||
| idma_reg32_1d #( | ||
| .NumRegs ( 1 ), | ||
| .NumStreams ( 1 ), | ||
| .IdCounterWidth ( 32 ), | ||
| .reg_req_t ( reg_req_t ), | ||
| .reg_rsp_t ( reg_rsp_t ), | ||
| .dma_req_t ( idma_req_t ) | ||
| ) i_frontend ( | ||
| .clk_i, | ||
| .rst_ni, | ||
| .dma_ctrl_req_i( reg_req_i ), | ||
| .dma_ctrl_rsp_o( reg_rsp_o ), | ||
| .dma_req_o ( backend_req ), | ||
| .req_valid_o ( backend_req_valid ), | ||
| .req_ready_i ( backend_req_ready ), | ||
| .next_id_i ( next_id ), | ||
| .stream_idx_o (), | ||
| .done_id_i ( completed_id ), | ||
| .busy_i ( backend_busy ), | ||
| .midend_busy_i ('0) | ||
| ); | ||
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| idma_transfer_id_gen #( | ||
| .IdWidth ( 32 ) | ||
| ) i_transfer_id_gen ( | ||
| .clk_i, | ||
| .rst_ni, | ||
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| .issue_i ( backend_req & frontend_req ), | ||
| .retire_i ( backend_rsp_valid ), | ||
| .next_o ( next_id ), | ||
| .completed_o( completed_id ) | ||
| ); | ||
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| assign backend_rsp_ready = 1'b1; | ||
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| // Backend | ||
| idma_backend_rw_obi #( | ||
| .DataWidth ( ObiCfg.DataWidth ), | ||
| .AddrWidth ( ObiCfg.AddrWidth ), | ||
| .UserWidth ( ObiCfg.OptionalCfg.AUserWidth ), | ||
| .AxiIdWidth ( ObiCfg.IdWidth ), | ||
| .NumAxInFlight ( 3 ), | ||
| .BufferDepth ( 3 ), | ||
| .TFLenWidth ( TFLenWidth ), | ||
| .MemSysDepth ( 3 ), | ||
| .CombinedShifter ( 1'b0 ), | ||
| .RAWCouplingAvail ( 1'b1 ), | ||
| .MaskInvalidData ( 1'b1 ), | ||
| .HardwareLegalizer ( 1'b1 ), | ||
| .RejectZeroTransfers ( 1'b1 ), | ||
| .ErrorCap ( idma_pkg::NO_ERROR_HANDLING ), | ||
| .PrintFifoInfo ( 1'b0 ), | ||
| .idma_req_t ( idma_req_t ), | ||
| .idma_rsp_t ( idma_rsp_t ), | ||
| .idma_eh_req_t ( idma_pkg::idma_eh_req_t ), | ||
| .idma_busy_t ( idma_pkg::idma_busy_t ), | ||
| .obi_req_t ( obi_req_t ), | ||
| .obi_rsp_t ( obi_rsp_t ), | ||
| .read_meta_channel_t ( read_meta_channel_t ), | ||
| .write_meta_channel_t( write_meta_channel_t ) | ||
| ) i_backend ( | ||
| .clk_i, | ||
| .rst_ni, | ||
| .testmode_i ( test_mode_i ), | ||
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| .idma_req_i ( backend_req ), | ||
| .req_valid_i ( backend_req_valid ), | ||
| .req_ready_o ( backend_req_ready ), | ||
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| .idma_rsp_o ( backend_rsp ), | ||
| .rsp_valid_o ( backend_rsp_valid ), | ||
| .rsp_ready_i ( backend_rsp_ready ), | ||
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| .idma_eh_req_i ( '0 ), | ||
| .eh_req_valid_i ( '0 ), | ||
| .eh_req_ready_o (), | ||
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| .obi_read_req_o ( obi_req_o[0] ), | ||
| .obi_read_rsp_i ( obi_rsp_i[0] ), | ||
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| .obi_write_req_o( obi_req_o[1] ), | ||
| .obi_write_rsp_i( obi_rsp_i[1] ), | ||
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| .busy_o ( backend_busy ) | ||
| ); | ||
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| endmodule |
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