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[vmvx] Relax requirement on fptosi lowering (iree-org#11553)
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The consumption of si of small width is already handled successfully by
consumers of this op (at least in limited trial). This was not true for
the ui version ---although I suspect consumer op there, but keeping it
more restricted until checked.
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jpienaar authored Dec 14, 2022
1 parent f060014 commit cee9b3c
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Showing 2 changed files with 9 additions and 7 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -926,11 +926,13 @@ class FPToSIOpConversion : public OpConversionPattern<arith::FPToSIOp> {
ConversionPatternRewriter &rewriter) const override {
auto srcType = srcOp.getIn().getType();
auto dstType = srcOp.getResult().getType();
auto resultType = getTypeConverter()->convertType(dstType);
if (srcType.isF32()) {
if (dstType.isSignlessInteger(32) || dstType.isSignedInteger(32)) {
auto resultType = getTypeConverter()->convertType(dstType);
rewriter.replaceOpWithNewOp<IREE::VM::CastF32SI32Op>(
srcOp, resultType, adaptor.getOperands()[0]);
// This uses the resultType rather than dstType as any truncation
// required will be handled via interpretation by consumer.
if (resultType.isSignlessInteger(32) || resultType.isSignedInteger(32)) {
rewriter.replaceOpWithNewOp<IREE::VM::CastF32SI32Op>(srcOp, resultType,
adaptor.getIn());
return success();
}
}
Expand All @@ -948,8 +950,8 @@ class FPToUIOpConversion : public OpConversionPattern<arith::FPToUIOp> {
auto resultType = getTypeConverter()->convertType(dstType);
if (srcType.isF32()) {
if (dstType.isSignlessInteger(32) || dstType.isUnsignedInteger(32)) {
rewriter.replaceOpWithNewOp<IREE::VM::CastF32UI32Op>(
srcOp, resultType, adaptor.getOperands()[0]);
rewriter.replaceOpWithNewOp<IREE::VM::CastF32UI32Op>(srcOp, resultType,
adaptor.getIn());
return success();
}
}
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Original file line number Diff line number Diff line change
Expand Up @@ -77,7 +77,7 @@ module @my_module {
module @t006_fptosi_fp32_i8 {
module @my_module {
func.func @my_fn(%arg0 : f32) -> (i8) {
// expected-error@+1 {{failed to legalize}}
// CHECK: vm.cast.f32.si32 %[[ARG0]] : f32 -> i32
%1 = arith.fptosi %arg0 : f32 to i8
return %1 : i8
}
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