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Fix CI issues.
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Nate Thompson committed Nov 28, 2021
1 parent 413bdbf commit 2a0b506
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Showing 3 changed files with 16 additions and 21 deletions.
2 changes: 1 addition & 1 deletion cirq-core/cirq/circuits/circuit_operation_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -321,7 +321,7 @@ def test_string_format():

fc0 = cirq.FrozenCircuit()
op0 = cirq.CircuitOperation(fc0)
assert (str(op0) == f"[ ]")
assert str(op0) == f"[ ]"

fc0_global_phase_inner = cirq.FrozenCircuit(
cirq.GlobalPhaseOperation(1j), cirq.GlobalPhaseOperation(1j)
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30 changes: 14 additions & 16 deletions cirq-core/cirq/circuits/circuit_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -392,14 +392,13 @@ def test_control_key_diagram_subcircuit():
cirq.testing.assert_has_diagram(
c,
"""
Circuit_0xfba37d11898c0e81:
[ 0: ───M─────── ]
0: ───[ ║ ]───
[ 1: ───╫───X─── ]
[ ║ ║ ]
[ a: ═══@═══^═══ ]
[ 0: ───M─────── ]
[ ║ ]
0: ───[ 1: ───╫───X─── ]───
[ ║ ║ ]
[ a: ═══@═══^═══ ]
1: ───#2────────────────────────────
1: ───#2───────────────────
""",
use_unicode_characters=True,
)
Expand All @@ -418,16 +417,15 @@ def test_control_key_diagram_subcircuit_layered():
cirq.testing.assert_has_diagram(
c,
"""
Circuit_0xa3bc42bd21c25cca:
[ 0: ───M─────── ]
0: ───M───[ ║ ]───────
║ [ 1: ───╫───X─── ]
║ [ ║ ║ ]
║ [ a: ═══@═══^═══ ]
[ 0: ───M─────── ]
[ ║ ]───────
0: ───M───[ 1: ───╫───X─── ]
║ [ ║ ║ ]
║ [ a: ═══@═══^═══ ]
║ ║
1: ───╫───#2────────────────────────────X───
║ ║
a: ═══@═══╩═════════════════════════════^═══
1: ───╫───#2───────────────────X───
║ ║ ║
a: ═══@═══╩════════════════════^═══
""",
use_unicode_characters=True,
)
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5 changes: 1 addition & 4 deletions cirq-core/cirq/testing/circuit_compare.py
Original file line number Diff line number Diff line change
Expand Up @@ -238,10 +238,7 @@ def assert_has_diagram(
actual_diagram = actual.to_text_diagram(**kwargs).lstrip("\n").rstrip()
desired_diagram = desired.lstrip("\n").rstrip()

def remove_subcircuit_labels(s: str):
return ''.join(line for line in s.splitlines() if 'Circuit_0x' not in line)

assert remove_subcircuit_labels(actual_diagram) == remove_subcircuit_labels(desired_diagram), (
assert actual_diagram == desired_diagram, (
"Circuit's text diagram differs from the desired diagram.\n"
'\n'
'Diagram of actual circuit:\n'
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