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update(cirq-rigetti): use pyquil v4 #6281

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250cba3
chore: use pyquil v4
jselig-rigetti Sep 6, 2023
23b6294
chore: change mock expectations
jselig-rigetti Sep 6, 2023
f1688ff
chore: keep key check
jselig-rigetti Sep 6, 2023
0daae21
chore: refactor away deprecation warning
jselig-rigetti Sep 6, 2023
cc71d1f
chore: ensure atomic memory values are sequences
jselig-rigetti Sep 7, 2023
2a813ca
chore: use stable pyquil v4 version
jselig-rigetti Sep 20, 2023
027ba98
Add support for Kraus operators, POVMs and parametric defgates
bramathon Sep 24, 2023
83e510e
clean up tests
bramathon Sep 24, 2023
474265b
Cleaned up formatting for quil_input
bramathon Sep 25, 2023
48027f6
Cleaned up formatting for quil_input_test
bramathon Sep 25, 2023
21c3fcd
Merge branch 'master' into rigetti-use-pyquil-v4
jselig-rigetti Nov 27, 2023
9ba2ac0
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Dec 1, 2023
5c200c1
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Dec 11, 2023
8064e4e
chore: fix lint
jselig-rigetti Dec 11, 2023
afca68b
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Dec 14, 2023
2cbfe1b
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Dec 18, 2023
f9fa557
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Mar 1, 2024
bf42e72
Update quil->cirq conversion
bramathon Mar 2, 2024
0b7c216
Fix formatting
bramathon Mar 2, 2024
25ef38d
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Mar 12, 2024
b1a1c1c
Update T1 experiment (#6487)
eliottrosenberg Mar 13, 2024
2d4de4f
Remove python3.9 from CI tests (#6495)
NoureldinYosri Mar 14, 2024
da0f221
update parallel XEB notebook (#6494)
NoureldinYosri Mar 15, 2024
7c65f16
Added `MSGate` to top level (#6466)
prakharb10 Mar 16, 2024
2f92166
Preserve circuit tags in transformer_primitives.map_operations (#6505)
maffoo Mar 18, 2024
0b93e27
Update ClassicalSimulator to confirm to simulation abstraction (#6432)
shef4 Mar 19, 2024
e3f7cf3
Fix capitalization of GitHub in docs (#6509)
dstrain115 Mar 20, 2024
b83e63d
Bump black from 23.3.0 to 24.3.0 in /dev_tools/requirements/deps (#6512)
dependabot[bot] Mar 20, 2024
32b5a0f
Format all files with black-24.3.0 (#6513)
pavoljuhas Mar 20, 2024
d6333a8
Add newly serializable gates to supported grid device gates (#6499)
NoureldinYosri Mar 20, 2024
1d630f0
Ignore Python code formatting in git blame (#6514)
pavoljuhas Mar 20, 2024
57c6d95
Bump follow-redirects from 1.15.4 to 1.15.6 in /cirq-web/cirq_ts (#6501)
dependabot[bot] Mar 20, 2024
7b285b5
Add documentation to cirq.decompose protocol regarding specific targe…
tanujkhattar Mar 22, 2024
ce3757c
Add UNIT_SWEEP as an alias for UnitSweep (#6518)
dstrain115 Mar 22, 2024
8260cf4
Merge serializable_forms and deserialized_forms (#6520)
verult Mar 22, 2024
9931158
Bump webpack-dev-middleware from 5.3.3 to 5.3.4 in /cirq-web/cirq_ts …
dependabot[bot] Mar 24, 2024
c4b50e5
Initialize processor sampler with the default device config key (#6521)
senecameeks Mar 27, 2024
1113626
Fix ci-daily workflow failures on Mac OS X (#6532)
pavoljuhas Mar 28, 2024
ef725d7
Bump express from 4.18.1 to 4.19.2 in /cirq-web/cirq_ts (#6533)
dependabot[bot] Mar 29, 2024
9458d09
Install cirq pre-release with stable dependencies (#6534)
pavoljuhas Mar 29, 2024
2311afd
Undo temporary version pin of mpmath (#6535)
pavoljuhas Mar 29, 2024
91a45a2
Add FSimViaModelTag (#6527)
BichengYing Mar 29, 2024
902c66d
Fix density matrix references in other simulators (#6537)
dstrain115 Mar 30, 2024
ccedd43
Add Serialization and Deserialization Support of FSimViaModelTag. (#6…
BichengYing Apr 1, 2024
cff979a
pin scipy to ~1.12.0 to temporarily fix ci (#6545)
NoureldinYosri Apr 2, 2024
0162147
Ensure the result of simulation is normalized (#6522)
NoureldinYosri Apr 3, 2024
f3ad0ac
Introduce gauge compilation (#6526)
NoureldinYosri Apr 3, 2024
782104e
CI - migrate to docker compose v2 (#6547)
pavoljuhas Apr 3, 2024
1794650
Add FSimViaModel Gate into device.proto (#6548)
BichengYing Apr 4, 2024
0bb17ea
Remove doc references to stale gitter channel (#6540)
dstrain115 Apr 4, 2024
c16a244
Loosen the scipy condition in requirements.txt (#6549)
BichengYing Apr 4, 2024
862439d
Bugfix in `comparison_key` and nicer `with_dimension` of `_BaseAncill…
tanujkhattar Apr 9, 2024
5630687
Remove the `--pre` option from verify-published-package.sh (#6536)
pavoljuhas Apr 9, 2024
aafa40b
Improve repr of `_BaseAncillaQid` classes with prefix (#6555)
pavoljuhas Apr 9, 2024
1d8304f
display tags by `str` instead of `repr` in circuit diagrams (#6530)
richrines1 Apr 10, 2024
3bc6d97
Avoid state vector normalization if it worsens the round offs (#6556)
pavoljuhas Apr 10, 2024
3c6d51d
Bump tar from 6.1.11 to 6.2.1 in /cirq-web/cirq_ts (#6559)
dependabot[bot] Apr 11, 2024
714fedf
check/all - exit with error status if any of checks failed (#6561)
pavoljuhas Apr 12, 2024
d61b802
Add Quantum Engine support for cirq.CZPowGate (#6562)
eliottrosenberg Apr 15, 2024
b4bbb02
Add UNKNOWN status code to retryable Quantum Engine errors (#6565)
wcourtney Apr 18, 2024
5ece8a9
Update AQT Backend (#6441)
jbrixon Apr 19, 2024
e9454c9
CI - downgrade to macos-13 which has the needed Python versions (#6578)
pavoljuhas Apr 25, 2024
a2cab0d
Fix `__len__` of empty Product sweep to match actual length (#6575)
maffoo Apr 25, 2024
c4176e3
Removed deprecated processor_ids (#6563)
JaShom Apr 26, 2024
e3068ae
Escape & in SVG diagrams (#6579)
tanujkhattar Apr 30, 2024
79b2954
Set maxsize of request queue to Quantum Engine (#6576)
senecameeks Apr 30, 2024
e95e6d3
Add a new gauge for SqrtCZ and support SqrtCZ† and fix and improve sp…
NoureldinYosri May 3, 2024
eeb4204
Optimize Clifford.__pow__ by using binary exponentiation (#6581)
migueltorrescosta May 6, 2024
ace9c3e
Avoid DivisionByZero error when TensorNetwork simplifies to a scalar …
pavoljuhas May 7, 2024
77693fc
Support Python 3.12 (#6516)
pavoljuhas May 9, 2024
d503e7b
NEP-29 - enforce minimum Python version 3.10 (#6591)
pavoljuhas May 9, 2024
77e3a0f
Implement dynamical decoupling. (#6515)
babacry May 9, 2024
4769f83
Add a note about conda env to dev doc (#6592)
NoureldinYosri May 9, 2024
a21219b
Optimise QubitPermutationGate decomposition (#6588)
migueltorrescosta May 10, 2024
df4d14e
CI - deflake `Isolated pytest Ubuntu` (#6593)
pavoljuhas May 10, 2024
7c76fb9
Delete cirq_ft (#6596)
NoureldinYosri May 13, 2024
71cf6e7
Suppress superfluous warnings from numpy (#6599)
dstrain115 May 15, 2024
c2ad35a
CI - deflake `Isolated pytest Ubuntu` (#6603)
pavoljuhas May 16, 2024
5ad129b
Release pins from all pytest-related packages (#6602)
pavoljuhas May 18, 2024
4597f56
Create a generalized uniform superposition state gate (#6506)
prag16 May 21, 2024
8d3ef80
--- (#6610)
dependabot[bot] May 21, 2024
a330a62
Add Quantum Engine Support for InternalGate (#6613)
senecameeks May 22, 2024
ca516fd
Fix nightly build of the staging cirq website (#6615)
pavoljuhas May 23, 2024
8ea8e1c
Update list of pre-release notebooks (#6609)
pavoljuhas May 23, 2024
fc5f932
enable simulation of controlled gates in classical simulator (#6589)
GregDMeyer May 23, 2024
38ce205
Fix spurious failure of the check/all script (#6611)
pavoljuhas May 23, 2024
95b9511
chore: fix tests after merge main
jselig-rigetti May 28, 2024
0aeff33
chore: fix lint errors
jselig-rigetti May 28, 2024
864f323
Merge branch 'main' into rigetti-use-pyquil-v4
pavoljuhas May 28, 2024
6853c28
chore: fix formatting errors
jselig-rigetti May 28, 2024
b0596f9
chore: formatting and type fixes
jselig-rigetti May 29, 2024
a4422e7
fix: linting
jselig-rigetti May 29, 2024
51e3b63
chore: format
jselig-rigetti May 29, 2024
b6318f1
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti May 29, 2024
8ca86d2
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti May 30, 2024
69cc065
chore: annotate question about type failures
jselig-rigetti May 30, 2024
6a18157
chore: fix type errors, require that qubits be ints
jselig-rigetti May 31, 2024
d5b1812
chore: add missing excetion documentation
jselig-rigetti May 31, 2024
b3471d9
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti May 31, 2024
b8c85cf
chore: cache defgate_to_cirq and start fixing json implementation of isa
jselig-rigetti May 31, 2024
3ab7c7a
chore: fix insignificant float rounding errors in json test fixture
jselig-rigetti May 31, 2024
55eabe5
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Jun 3, 2024
f0273ed
chore: add pragma no cover for underscore methods
jselig-rigetti Jun 3, 2024
8412760
test: add pragma no cover to all lines failing coverage test
jselig-rigetti Jun 3, 2024
ef4c1f3
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Jun 4, 2024
770a75c
chore: remove print calls in tests
jselig-rigetti Jun 5, 2024
5bd7252
chore: mock and test RigettiQCSService.list_quantum_processors
jselig-rigetti Jun 5, 2024
f667099
chore: remove unused test
jselig-rigetti Jun 5, 2024
756afac
chore: increate pyquil version requirement
jselig-rigetti Jun 6, 2024
e1e200e
chore: fix import ordering lint complaint, unimplemented abstract met…
jselig-rigetti Jun 7, 2024
5245a7d
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Jun 7, 2024
23f086d
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Jun 10, 2024
e36bb35
chore: use qvm to create qcs service in tests
jselig-rigetti Jun 10, 2024
e2deb8f
fix: code review suggestions: default None for optional arguments, us…
jselig-rigetti Jun 10, 2024
41c49f5
test: add test for get_rigetti_qcs_aspen_device
jselig-rigetti Jun 10, 2024
34641c4
Update cirq-rigetti/cirq_rigetti/service_test.py
jselig-rigetti Jun 11, 2024
58bbd89
Merge branch 'main' into rigetti-use-pyquil-v4
jselig-rigetti Jun 11, 2024
502e195
chore: fix formatting
jselig-rigetti Jun 11, 2024
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43 changes: 0 additions & 43 deletions cirq-rigetti/cirq_rigetti/_qcs_api_client_decorator.py

This file was deleted.

32 changes: 14 additions & 18 deletions cirq-rigetti/cirq_rigetti/aspen_device.py
Original file line number Diff line number Diff line change
Expand Up @@ -11,17 +11,16 @@
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
from typing import List, cast, Optional, Union, Dict, Any
from typing import List, Optional, Union, Dict, Any
import functools
from math import sqrt
import httpx
import json
import numpy as np
import networkx as nx
import cirq
from pyquil.quantum_processor import QCSQuantumProcessor
from qcs_api_client.models import InstructionSetArchitecture
from qcs_api_client.operations.sync import get_instruction_set_architecture
from cirq_rigetti._qcs_api_client_decorator import _provide_default_client
from qcs_sdk.client import QCSClient
from qcs_sdk.qpu.isa import get_instruction_set_architecture, InstructionSetArchitecture, Family


class UnsupportedQubit(ValueError):
Expand Down Expand Up @@ -50,6 +49,8 @@ class UnsupportedRigettiQCSQuantumProcessor(ValueError):
class RigettiQCSAspenDevice(cirq.devices.Device):
"""A cirq.Qid supporting Rigetti QCS Aspen device topology."""

isa: InstructionSetArchitecture

def __init__(self, isa: Union[InstructionSetArchitecture, Dict[str, Any]]) -> None:
"""Initializes a RigettiQCSAspenDevice with its Rigetti QCS `InstructionSetArchitecture`.

Expand All @@ -63,9 +64,9 @@ def __init__(self, isa: Union[InstructionSetArchitecture, Dict[str, Any]]) -> No
if isinstance(isa, InstructionSetArchitecture):
self.isa = isa
else:
self.isa = InstructionSetArchitecture.from_dict(isa)
self.isa = InstructionSetArchitecture.from_raw(json.dumps(isa))

if self.isa.architecture.family.lower() != 'aspen':
if self.isa.architecture.family != Family.Aspen:
raise UnsupportedRigettiQCSQuantumProcessor(
'this integration currently only supports Aspen devices, '
f'but client provided a {self.isa.architecture.family} device'
Expand Down Expand Up @@ -224,23 +225,23 @@ def __repr__(self):
return f'cirq_rigetti.RigettiQCSAspenDevice(isa={self.isa!r})'

def _json_dict_(self):
return {'isa': self.isa.to_dict()}
return {'isa': json.loads(self.isa.json())}

@classmethod
def _from_json_dict_(cls, isa, **kwargs):
return cls(isa=InstructionSetArchitecture.from_dict(isa))
return cls(isa=InstructionSetArchitecture.from_raw(json.dumps(isa)))


@_provide_default_client # pragma: no cover
# pragma: no cover
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@pavoljuhas pavoljuhas Jun 10, 2024

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The # pragma: no cover comment is ineffective here.
Please move to the end of the line 238, ie, the end of the def statement to
ignore coverage for the entire get_rigetti_qcs_aspen_device function.

Better yet, adding a unit test would be nicer, even with a mock of the get_instruction_set_architecture function.

PS: to test the coverage and if # pragma: no cover comments apply you can use

$ check/pytest --rigetti-integration cirq-rigetti/ --cov=cirq_rigetti --cov-report=html

and then inspect the htmlcov/index.html file.

def get_rigetti_qcs_aspen_device(
quantum_processor_id: str, client: Optional[httpx.Client]
quantum_processor_id: str, client: Optional[QCSClient]
jselig-rigetti marked this conversation as resolved.
Show resolved Hide resolved
) -> RigettiQCSAspenDevice:
"""Retrieves a `qcs_api_client.models.InstructionSetArchitecture` from the Rigetti
QCS API and uses it to initialize a RigettiQCSAspenDevice.

Args:
quantum_processor_id: The identifier of the Rigetti QCS quantum processor.
client: Optional; A `httpx.Client` initialized with Rigetti QCS credentials
client: Optional; A `QCSClient` initialized with Rigetti QCS credentials
and configuration. If not provided, `qcs_api_client` will initialize a
configured client based on configured values in the current user's
`~/.qcs` directory or default values.
Expand All @@ -250,12 +251,7 @@ def get_rigetti_qcs_aspen_device(
set and architecture.

"""
isa = cast(
InstructionSetArchitecture,
get_instruction_set_architecture(
client=client, quantum_processor_id=quantum_processor_id
).parsed,
)
isa = get_instruction_set_architecture(client=client, quantum_processor_id=quantum_processor_id)
return RigettiQCSAspenDevice(isa=isa)


Expand Down
27 changes: 8 additions & 19 deletions cirq-rigetti/cirq_rigetti/aspen_device_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,6 @@
from unittest.mock import patch, PropertyMock
from math import sqrt
import pathlib
import json
import pytest
import cirq
from cirq_rigetti import (
Expand All @@ -12,9 +11,8 @@
RigettiQCSAspenDevice,
UnsupportedQubit,
UnsupportedRigettiQCSOperation,
UnsupportedRigettiQCSQuantumProcessor,
)
from qcs_api_client.models import InstructionSetArchitecture, Node
from qcs_sdk.qpu.isa import InstructionSetArchitecture, Family
import numpy as np

dir_path = pathlib.Path(os.path.dirname(os.path.realpath(__file__)))
Expand All @@ -24,7 +22,7 @@
@pytest.fixture
def qcs_aspen8_isa() -> InstructionSetArchitecture:
with open(fixture_path / 'QCS-Aspen-8-ISA.json', 'r') as f:
return InstructionSetArchitecture.from_dict(json.load(f))
return InstructionSetArchitecture.from_raw(f.read())


def test_octagonal_qubit_index():
Expand Down Expand Up @@ -204,17 +202,6 @@ def test_rigetti_qcs_aspen_device_invalid_qubit(
device.validate_operation(cirq.I(qubit))


def test_rigetti_qcs_aspen_device_non_existent_qubit(qcs_aspen8_isa: InstructionSetArchitecture):
"""test RigettiQCSAspenDevice throws error when qubit does not exist on device"""
# test device may only be initialized with Aspen ISA.
device_with_limited_nodes = RigettiQCSAspenDevice(
isa=InstructionSetArchitecture.from_dict(qcs_aspen8_isa.to_dict())
)
device_with_limited_nodes.isa.architecture.nodes = [Node(node_id=10)]
with pytest.raises(UnsupportedQubit):
device_with_limited_nodes.validate_qubit(cirq.GridQubit(0, 0))


@pytest.mark.parametrize(
'operation',
[
Expand Down Expand Up @@ -265,7 +252,9 @@ def test_rigetti_qcs_aspen_device_repr(qcs_aspen8_isa: InstructionSetArchitectur

def test_rigetti_qcs_aspen_device_family_validation(qcs_aspen8_isa: InstructionSetArchitecture):
"""test RigettiQCSAspenDevice validates architecture family on initialization"""
non_aspen_isa = InstructionSetArchitecture.from_dict(qcs_aspen8_isa.to_dict())
non_aspen_isa.architecture.family = "not-aspen" # type: ignore
with pytest.raises(UnsupportedRigettiQCSQuantumProcessor):
RigettiQCSAspenDevice(isa=non_aspen_isa)
non_aspen_isa = InstructionSetArchitecture.from_raw(qcs_aspen8_isa.json())
non_aspen_isa.architecture.family = Family.NONE

assert (
non_aspen_isa.architecture.family == Family.Aspen
), 'ISA family is read-only and should still be Aspen'
23 changes: 11 additions & 12 deletions cirq-rigetti/cirq_rigetti/circuit_sweep_executors.py
Original file line number Diff line number Diff line change
Expand Up @@ -57,21 +57,22 @@ def _execute_and_read_result(
Raises:
ValueError: measurement_id_map references an undefined pyQuil readout region.
"""
if memory_map is None:
memory_map = {}

for region_name, values in memory_map.items():
if isinstance(region_name, str):
executable.write_memory(region_name=region_name, value=values)
else:
raise ValueError(f'Symbols not valid for region name {region_name}')
qam_execution_result = quantum_computer.qam.run(executable)
# convert all atomic memory values into 1-length lists
if memory_map is not None:
for region_name, value in memory_map.items():
if not isinstance(region_name, str):
raise ValueError(f'Symbols not valid for region name {region_name}')
value = [value] if not isinstance(value, Sequence) else value
memory_map[region_name] = value

qam_execution_result = quantum_computer.qam.run(executable, memory_map) # type: ignore

measurements = {}
# For every key, value in QuilOutput#measurement_id_map, use the value to read
# Rigetti QCS results and assign to measurements by key.
for cirq_memory_key, pyquil_region in measurement_id_map.items():
readout = qam_execution_result.readout_data.get(pyquil_region)
readout = qam_execution_result.get_register_map().get(pyquil_region)
if readout is None:
raise ValueError(f'readout data does not have values for region "{pyquil_region}"')
measurements[cirq_memory_key] = readout
Expand Down Expand Up @@ -122,9 +123,7 @@ def _prepend_real_declarations(
param_dict = _get_param_dict(resolver)
for key in param_dict.keys():
declaration = Declare(str(key), "REAL")
program._instructions.insert(0, declaration)
program._synthesized_instructions = None
program.declarations[declaration.name] = declaration
program = Program(declaration) + program
logger.debug(f"prepended declaration {declaration}")
return program

Expand Down
5 changes: 3 additions & 2 deletions cirq-rigetti/cirq_rigetti/circuit_transformers_test.py
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@
from unittest.mock import create_autospec
import cirq
import numpy as np
from pyquil import Program
from pyquil.gates import MEASURE, RX, DECLARE, H, CNOT, I
from pyquil.quilbase import Pragma, Reset
from cirq_rigetti import circuit_transformers as transformers
Expand Down Expand Up @@ -63,15 +64,15 @@ def test_transform_with_post_transformation_hooks(
bell_circuit, qubits = bell_circuit_with_qids

def reset_hook(program, measurement_id_map):
program._instructions.insert(0, Reset())
program = Program(Reset()) + program
return program, measurement_id_map

reset_hook_spec = create_autospec(reset_hook, side_effect=reset_hook)

pragma = Pragma('INTIAL_REWIRING', freeform_string='GREEDY')

def rewire_hook(program, measurement_id_map):
program._instructions.insert(0, pragma)
program = Program(pragma) + program
return program, measurement_id_map

rewire_hook_spec = create_autospec(rewire_hook, side_effect=rewire_hook)
Expand Down
82 changes: 62 additions & 20 deletions cirq-rigetti/cirq_rigetti/conftest.py
Original file line number Diff line number Diff line change
Expand Up @@ -12,19 +12,35 @@
# See the License for the specific language governing permissions and
# limitations under the License.

from typing import Tuple, Optional, List, Union, Generic, TypeVar, Dict
from typing import (
Any,
Iterable,
Mapping,
Sequence,
Tuple,
Optional,
List,
Union,
Generic,
TypeVar,
Dict,
)

from unittest.mock import create_autospec, Mock
import pytest
from pyquil import Program
from pyquil.quantum_processor import AbstractQuantumProcessor, NxQuantumProcessor
from pyquil.api import QAM, QuantumComputer, QuantumExecutable, QAMExecutionResult, EncryptedProgram
from pyquil.api._abstract_compiler import AbstractCompiler
from qcs_api_client.client._configuration.settings import QCSClientConfigurationSettings
from qcs_api_client.client._configuration import (
QCSClientConfiguration,
QCSClientConfigurationSecrets,
from pyquil.api import (
QAM,
QuantumComputer,
QuantumExecutable,
QAMExecutionResult,
EncryptedProgram,
MemoryMap,
)
from pyquil.api._abstract_compiler import AbstractCompiler
from qcs_sdk import QCSClient, ExecutionData, ResultData, RegisterData
from qcs_sdk.qvm import QVMResultData
import networkx as nx
import cirq
import sympy
Expand All @@ -41,10 +57,25 @@ def __init__(self, *args, **kwargs) -> None:
self._run_count = 0
self._mock_results: Dict[str, np.ndarray] = {}

def execute(self, executable: QuantumExecutable) -> T: # type: ignore[empty-body]
def execute(
self,
executable: Union[EncryptedProgram, Program],
memory_map: Optional[Mapping[str, Union[Sequence[int], Sequence[float]]]] = ...,
**kwargs: Any,
) -> Any:
pass

def run(self, program: QuantumExecutable) -> QAMExecutionResult:
def execute_with_memory_map_batch( # type: ignore[empty-body]
self, executable: QuantumExecutable, memory_maps: Iterable[MemoryMap], **kwargs: Any
) -> List[T]:
pass

def run(
self,
executable: Union[EncryptedProgram, Program],
memory_map: Optional[Mapping[str, Union[Sequence[int], Sequence[float]]]] = ...,
**kwargs: Any,
) -> Any:
raise NotImplementedError

def get_result(self, execute_response: T) -> QAMExecutionResult:
Expand All @@ -55,9 +86,12 @@ class MockCompiler(AbstractCompiler):
def quil_to_native_quil(self, program: Program, *, protoquil: Optional[bool] = None) -> Program:
raise NotImplementedError

def native_quil_to_executable(self, nq_program: Program) -> QuantumExecutable:
def native_quil_to_executable(self, nq_program: Program, **kwargs: Any) -> QuantumExecutable:
raise NotImplementedError

def reset(self) -> None:
pass


@pytest.fixture
def qam() -> QAM:
Expand All @@ -71,18 +105,14 @@ def quantum_processor() -> AbstractQuantumProcessor:


@pytest.fixture
def qcs_client_configuration() -> QCSClientConfiguration:
settings = QCSClientConfigurationSettings()
secrets = QCSClientConfigurationSecrets()
return QCSClientConfiguration(profile_name="default", settings=settings, secrets=secrets)
def qcs_client() -> QCSClient:
return QCSClient()


@pytest.fixture
def compiler(quantum_processor, qcs_client_configuration) -> AbstractCompiler:
def compiler(quantum_processor, qcs_client) -> AbstractCompiler:
return MockCompiler(
client_configuration=qcs_client_configuration,
timeout=0,
quantum_processor=quantum_processor,
client_configuration=qcs_client, timeout=0, quantum_processor=quantum_processor
)


Expand Down Expand Up @@ -158,14 +188,26 @@ def native_quil_to_executable(nq_program: Program) -> QuantumExecutable:
side_effect=native_quil_to_executable,
)

def run(program: Union[Program, EncryptedProgram]) -> QAMExecutionResult:
def run(
program: Union[Program, EncryptedProgram], memory_map: MemoryMap
) -> QAMExecutionResult:
qam = quantum_computer.qam
qam._mock_results = qam._mock_results or {} # type: ignore
qam._mock_results["m0"] = results[qam._run_count] # type: ignore

quantum_computer.qam._run_count += 1 # type: ignore
return QAMExecutionResult(
executable=program, readout_data=qam._mock_results # type: ignore
executable=program,
data=ExecutionData(
result_data=ResultData.from_qvm(
QVMResultData.from_memory_map(
{
k: RegisterData.from_f64([v])
for k, v in qam._mock_results.items() # type: ignore
}
)
)
),
)

quantum_computer.qam.run = Mock(quantum_computer.qam.run, side_effect=run) # type: ignore
Expand Down

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