WIP: gpio api

Makefile

@@ -1,6 +1,6 @@
 # General Target Settings
 TARGET	= bluepill-serial-monster
-SRCS	= main.c system_clock.c status_led.c usb_core.c usb_descriptors.c usb_io.c usb_uid.c usb_panic.c usb_cdc.c cdc_shell.c
+SRCS	= main.c system_clock.c status_led.c usb_core.c usb_descriptors.c usb_io.c usb_uid.c usb_panic.c usb_cdc.c cdc_shell.c gpio.c
 
 # Toolchain & Utils
 CC		= arm-none-eabi-gcc

cdc_config.h

@@ -35,7 +35,7 @@ typedef struct {
     usb_cdc_output_t    output_type;
     usb_cdc_polarity_t  polarity;
     usb_cdc_pull_type_t pull;
-} __attribute__ ((packed)) cdc_port_signal_t;
+} __attribute__ ((packed)) cdc_port_signal_config_t;
 
 typedef enum {
     usb_cdc_signal_rx   = 0x00,
@@ -49,7 +49,7 @@ typedef enum {
 } __attribute__ ((packed)) usb_cdc_signal_t;
 
 typedef struct {
-    usb_cdc_signal_t signal_configurations[usb_cdc_signal_last];
+    cdc_port_signal_config_t signal_configurations[usb_cdc_signal_last];
 } __attribute__ ((packed)) usb_cdc_port_config_t;
 
 typedef struct {

gpio.c

@@ -0,0 +1,41 @@
+#include "gpio.h"
+
+static void _gpio_enable_port(GPIO_TypeDef *port) {
+    int portnum = (((uint32_t)port - GPIOA_BASE) / (GPIOB_BASE - GPIOA_BASE));
+    RCC->APB2ENR |= RCC_APB2ENR_IOPAEN << portnum;
+}
+
+void gpio_pin_init(const gpio_pin_config_t *pincfg) {
+    volatile uint32_t *crx = &pincfg->port->CRL + (pincfg->pin >> 3);
+    uint8_t crx_offset = (pincfg->pin & 0x07) << 2;
+    uint32_t modecfg = 0;
+    _gpio_enable_port(pincfg->port);
+    if (pincfg->dir == gpio_dir_input) {
+        if (pincfg->pull == gpio_pull_floating) {
+            modecfg |= GPIO_CRL_CNF0_0;
+        } else {
+            modecfg |= GPIO_CRL_CNF0_1;
+            pincfg->port->BSRR = ((pincfg->pull == gpio_pull_up) ? GPIO_BSRR_BS0 : GPIO_BSRR_BR0) << pincfg->pin;
+        }
+    } else {
+        switch (pincfg->speed) {
+        case gpio_speed_low:
+            modecfg |= GPIO_CRL_MODE0_1;
+            break;
+        case gpio_speed_medium:
+            modecfg |= GPIO_CRL_MODE0_0;
+            break;
+        case gpio_speed_high:
+            modecfg |= GPIO_CRL_MODE0;
+            break;
+        }
+        if (pincfg->output == gpio_output_od) {
+            modecfg |= GPIO_CRL_CNF0_0;
+        }
+        if (pincfg->func == gpio_func_alternate) {
+            modecfg |= GPIO_CRL_CNF0_1;
+        }
+    }
+    *crx &= ~((GPIO_CRL_CNF0 | GPIO_CRL_MODE0) << crx_offset);
+    *crx |= (modecfg << crx_offset);
+}

gpio.h

@@ -0,0 +1,52 @@
+#ifndef GPIO_H
+#define GPIO_H
+
+#include <stdint.h>
+#include <stm32f1xx.h>
+
+typedef enum {
+    gpio_dir_input,
+    gpio_dir_output,
+} __attribute__ ((packed)) gpio_dir_t;
+
+typedef enum {
+    gpio_func_general,
+    gpio_func_alternate,
+} __attribute__ ((packed)) gpio_func_t;
+
+typedef enum {
+    gpio_output_pp,
+    gpio_output_od,
+} __attribute__ ((packed)) gpio_output_t;
+
+typedef enum {
+    gpio_pull_floating,
+    gpio_pull_up,
+    gpio_pull_down,
+} __attribute__ ((packed)) gpio_pull_t;
+
+typedef enum {
+     gpio_polarity_high,
+     gpio_polarity_low
+} __attribute__ ((packed)) gpio_polarity_t;
+
+typedef enum {
+     gpio_speed_low,
+     gpio_speed_medium,
+     gpio_speed_high,
+} __attribute__ ((packed)) gpio_speed_t;
+
+typedef struct {
+    GPIO_TypeDef*       port;
+    uint8_t             pin;
+    gpio_dir_t          dir;
+    gpio_func_t         func;
+    gpio_output_t       output;
+    gpio_pull_t         pull;
+    gpio_polarity_t     polarity;
+    gpio_speed_t        speed;
+} __attribute__ ((packed)) gpio_pin_config_t;
+
+void gpio_pin_init(const gpio_pin_config_t *pincfg);
+
+#endif /* GPIO_G */