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Revised Virtual Memory #45
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Co-authored-by: Victor Roest <victor@xirion.net>
Co-authored-by: Victor Roest <victor@xirion.net>
Co-authored-by: Victor Roest <victor@xirion.net>
Co-authored-by: Victor Roest <victor@xirion.net>
Co-authored-by: Victor Roest <victor@xirion.net>
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Co-authored-by: Victor Roest <victor@xirion.net>
make panic exit codes more obvious.
Co-authored-by: Victor Roest <victor@xirion.net>
Co-authored-by: Victor Roest <victor@xirion.net>
Co-authored-by: Jonathan Dönszelmann <jonabent@gmail.com>
* Resolved easy TODOs where possible * Converted `panic` calls to `FATAL` (for better logging) * Resolved some code analysis issues CLion flagged
Co-authored-by: Victor Roest <victor@xirion.net>
…om the OS pagetable. This saves 8KiB (!) per process. It also makes caching more efficient. Co-authored-by: Jonathan Dönszelmann <jonabent@gmail.com>
@dsluijk I think we addressed most if not all of your issues, if you could look at the changes again that would be appreciated. |
And removed some unused header files.
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I'll try and test it later. Apart from some very minor things it looks good!
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// Switch back SVC/Kernel | ||
MSR CPSR_c, #Mode_SVC | ||
ADD fp, sp, #0 // ??? |
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What the difference with a regular mov here?
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I do not know, this was there in the original and I'm too scared to change it
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according to 10 minutes of research it's faster nor different to a simple mov. Compilers may generate it as part of a function header to help debuggers identify them. the #0 can be replaced by n for n variables in the stackframe. In this position it's confusing and useless and can be replaced by a simple mov.
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2 more minutes of research found that add is actually faster in 1 nonsequential cycle.
paraphrased from the arm manual:
The data operations ADD, SUB, RSB, ADC, SBC are 2S + 1I while RSC, ORR, EOR, MOV, BIC are 2S + 1N + 1I where I means internal cycle, N means nonsequential cycle and S means sequential cycle
Shouldn't make much of a difference here though, and is mostly confusing
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should be a mov imo
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LGTM
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