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fix 7bit post on byte lenght mod 3 == 2
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Got my 1 and 2 switched around
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remy committed May 11, 2021
1 parent d8fecb7 commit 253e96b
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Showing 4 changed files with 7 additions and 8 deletions.
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3 changes: 1 addition & 2 deletions src/main.asm
Original file line number Diff line number Diff line change
Expand Up @@ -232,7 +232,7 @@ Post

call Wifi.tcpSendBufferFrame

;; now send the bank broken down in to chunks of
;; now send the bank over UART broken down in to chunks of
;; 2048 for 8bit and 1536 for 7bit (to allow for encoding)
ld de, State.offset ; load and prepare the offset
call StringToNumber16 ; HL = offset
Expand Down Expand Up @@ -386,7 +386,6 @@ LoadPackets
jp Error

PreExitCheck
CSP_BREAK
ld a, (State.fileMode)
cp NOT_WRITING_TO_FILE
jr z, .cleanExit
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2 changes: 1 addition & 1 deletion src/version.inc.asm
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
IFNDEF TESTING
DEFINE VERSION "1.0-24rc"
DEFINE VERSION "1.0-25rc"
ELSE
DEFINE VERSION "TEST"
ENDIF
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10 changes: 5 additions & 5 deletions src/wifi.asm
Original file line number Diff line number Diff line change
Expand Up @@ -209,16 +209,16 @@ tcpSendEncodedBufferFrame:

;; work out how much padding is required now we're at the end
ld a, (State.padding)
and a
and a ; if padding == 0 then don't add any null bytes
jr z, .padNone

cp 2
cp 2 ; if padding == 2 null out Base64.input + 1 & + 2 (end)
jr nz, .padOne
xor a
ld (Base64.input+2), a
ld (Base64.input+1), a
.padOne
xor a
ld (Base64.input+1), a
ld (Base64.input+2), a

.padNone
scf ; set carry as a flag for encode process
Expand All @@ -242,7 +242,7 @@ tcpSendEncodedBufferFrame:

pop bc

dec bc ; adjust for the 4 bytes we just send
dec bc ; adjust for the 4 bytes we just sent
dec bc
dec bc
dec bc
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