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This commit adds initial paging support for aarch64. This implementation creates identity mapping translation tables for Cloud Hypervisor. The most of paging implementation is based on [1]. It also introduces use of `asm_const` [2] to parameterize FDT base address and stack base address. [1] https://github.com/rust-embedded/rust-raspberrypi-OS-tutorials/tree/master/10_virtual_mem_part1_identity_mapping [2] rust-lang/rust#93332 Signed-off-by: Akira Moroo <retrage01@gmail.com>
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// SPDX-License-Identifier: Apache-2.0 | ||
// Copyright (C) 2022 Akira Moroo | ||
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use super::layout::map; | ||
use core::arch::global_asm; | ||
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global_asm!(include_str!("ram64.s")); | ||
global_asm!(include_str!("ram64.s"), | ||
FDT_START = const map::dram::FDT_START, | ||
STACK_END = const map::dram::STACK_END); |
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// SPDX-License-Identifier: Apache-2.0 | ||
// Copyright (C) 2022 Akira Moroo | ||
// Copyright (c) 2021-2022 Andre Richter <andre.o.richter@gmail.com> | ||
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use core::ops::RangeInclusive; | ||
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use super::paging::*; | ||
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pub mod map { | ||
pub const END: usize = 0x1_0000_0000; | ||
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pub mod fw { | ||
pub const START: usize = 0x0000_0000; | ||
pub const END: usize = 0x0040_0000; | ||
} | ||
pub mod mmio { | ||
pub const START: usize = super::fw::END; | ||
pub const PL011_START: usize = 0x0900_0000; | ||
pub const PL031_START: usize = 0x0901_0000; | ||
pub const END: usize = 0x4000_0000; | ||
} | ||
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pub mod dram { | ||
const FDT_SIZE: usize = 0x0020_0000; | ||
const ACPI_SIZE: usize = 0x0020_0000; | ||
pub const STACK_SIZE: usize = 0x0800_0000; | ||
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pub const START: usize = super::mmio::END; | ||
pub const FDT_START: usize = START; | ||
pub const ACPI_START: usize = FDT_START + FDT_SIZE; | ||
pub const KERNEL_START: usize = ACPI_START + ACPI_SIZE; | ||
pub const STACK_START: usize = STACK_END - STACK_SIZE; | ||
pub const STACK_END: usize = RESERVED_START; | ||
pub const RESERVED_START: usize = 0xfc00_0000; | ||
pub const END: usize = super::END; | ||
} | ||
} | ||
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pub type KernelAddrSpace = AddressSpace<{ map::END }>; | ||
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const NUM_MEM_RANGES: usize = 3; | ||
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pub static LAYOUT: KernelVirtualLayout<NUM_MEM_RANGES> = KernelVirtualLayout::new( | ||
map::END - 1, | ||
[ | ||
TranslationDescriptor { | ||
name: "Firmware", | ||
virtual_range: RangeInclusive::new(map::fw::START, map::fw::END - 1), | ||
physical_range_translation: Translation::Identity, | ||
attribute_fields: AttributeFields { | ||
mem_attributes: MemAttributes::CacheableDRAM, | ||
acc_perms: AccessPermissions::ReadWrite, | ||
execute_never: false, | ||
}, | ||
}, | ||
TranslationDescriptor { | ||
name: "Device MMIO", | ||
virtual_range: RangeInclusive::new(map::mmio::START, map::mmio::END - 1), | ||
physical_range_translation: Translation::Identity, | ||
attribute_fields: AttributeFields { | ||
mem_attributes: MemAttributes::Device, | ||
acc_perms: AccessPermissions::ReadWrite, | ||
execute_never: true, | ||
}, | ||
}, | ||
TranslationDescriptor { | ||
name: "System Memory", | ||
virtual_range: RangeInclusive::new(map::dram::START, map::dram::END - 1), | ||
physical_range_translation: Translation::Identity, | ||
attribute_fields: AttributeFields { | ||
mem_attributes: MemAttributes::CacheableDRAM, | ||
acc_perms: AccessPermissions::ReadWrite, // FIXME | ||
execute_never: false, | ||
}, | ||
}, | ||
], | ||
); | ||
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pub fn virt_mem_layout() -> &'static KernelVirtualLayout<NUM_MEM_RANGES> { | ||
&LAYOUT | ||
} |
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#[cfg(not(test))] | ||
pub mod asm; | ||
pub mod layout; | ||
pub mod paging; | ||
mod translation; |
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