Open-Source Standard Cell Design Methodology

A 12-track height standard cell library built in SKY130 PDK. It is made up of 12 combinational cells, which were designed using Magic VLSI Layout Tool and characterized using Digital Standard Cell Characterizer (DSCC).

The detailed documentation of this library can be read in Open-Source Standard Cell and I/O Cell Design

The Library

It is made up of the following 12 combinational cells:

1. INV
2. BUFF
3. NAND2
4. NOR2
5. AOI21
6. OAI21
7. AOI22
8. OAI22
9. AOI211
10. OAI211

Where each cell consists of the following views (files):

• Layout (.mag)
• LEF (.lef)
• Extracted Spice model (.spice)
• LIB (.lib)
• Timing data (.txt)

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Design Files

It was developed a set of scripts during both the design process and the cell characterization:

1. DSCC : Digital Standard Cell Characterization tool.
2. Fo4 : Data and post-processing script for the Fo4 testbench.
3. Grid Template : Script to create custom height grids for layout implementation.
4. Inverter Chain : Data and post-processing scripts for the inverter chain testbench.
5. Results : Testbench for timing measurements of the inverter designed with the optimal widths obtained.