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Change scratch register of tail to t2 when Zicfilp enabled. #93
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OK with me, but I'd like to know if there actually is a problem with unconditionally changing to t2
. Having both options seems like an unnecessary complication (although I concede it's only a very minor complication).
@aswaterman The reason I suggest keep both is I don't want make older tool become non-conformance with this asm manual, but maybe we could using different way/wording to prevent that? |
I still believe the extension should have been defined in a way that doesn't break existing practices, and it's pretty weird to have |
Without thinking through all the implications, my instincts are that it is much better to change the PLT implementation (which is technically also specified today, but really shouldn't be, the code should just be an example of a possible implementation, as application code shouldn't know/care about it) than to change the semantics of pseudo-instructions. |
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Whatever change is made here should also be reflected in the table.
Looks good to me. |
Done. |
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Ideally we should keep those pseudo instructions consistency in every situation, but I know it's kinda trade off in ISA design, so LGTM from my side as well.
PseudoTail should be a software guarded branch in Ziciflp, since its branch target is known in link time. JALR/C.JR/C.JALR with rs1 as t2 is termed a software guarded branch. Such branches do not need to land on a lpad instruction. ABI Change PR: riscv-non-isa/riscv-asm-manual#93
PseudoTail should be a software guarded branch in Ziciflp, since its branch target is known in link time. JALR/C.JR/C.JALR with rs1 as t2 is termed a software guarded branch. Such branches do not need to land on a lpad instruction. ABI Change PR: riscv-non-isa/riscv-asm-manual#93
NOTE: public review period for zicfiss and zicfilp are ended, waiting for ratification flow and then we will merge this. |
Zicfiss, Zicfilp were ratified in June. |
This change is to make `tail` conform with software guarded jump of [Zicfilp]. The reason to not choose `t1` as the label register is that `t1` is also as `.got.plt` offset of `_dl_runtime_resolve` in [PLT]. [Zicfilp]: https://github.com/riscv/riscv-cfi/blob/main/cfi_forward.adoc [PLT]: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#procedure-linkage-table
Rebased to fix conflicts. |
This change is to make
tail
conform with software guarded jump of Zicfilp. The reason to not chooset1
as the label register is thatt1
is also as.got.plt
offset of_dl_runtime_resolve
in PLT.