Fix typos

Signed-off-by: Ved Shanbhogue <91900059+ved-rivos@users.noreply.github.com>

reri_err_reporting.adoc

@@ -335,7 +335,7 @@ a RAS handler an opportunity to initialize itself for handling RAS signals and t
 initialize the hardware units that generate the RAS signals before error reporting
 is enabled.
 
-The signal generated by the error record may in addition to causing a
+The signal generated by the error record may in addition to causing an
 interrupt/event notification be also used to carry additional information to aid
 the RAS handler in the platform.
 
@@ -388,8 +388,8 @@ to 0.
 Software may determine if the error record was read atomically by first reading
 the registers of the error record, then clearing the valid in `status_i` by
 writing 1 to `control_i.sinv` and then reading the `status_i` register again to
-determine if the `v` field was cleared to 0. If the `v` field is is still 1 but
-the `rdip` field is 0 then it indicative of an overwrite that may have occurred
+determine if the `v` field was cleared to 0. If the `v` field is still 1 but
+the `rdip` field is 0 then it is indicative of an overwrite that may have occurred
 during the process of reading the error record. If the `v` field is 1 and the
 `rdip` is also 1 then it indicates a new error was recorded after the `v` field
 was cleared; but the read of the error record to collect the previous error was
@@ -619,7 +619,7 @@ a fabric component to implicitly access a routing table data structure.
 <<<
 
 If the detected error reports additional information in the `info_i` register
-then information-valid (`iv`) field is set to 1. If the detected error reports
+then the information-valid (`iv`) field is set to 1. If the detected error reports
 additional supplemental information in the `suppl_info_i` register then
 supplemental-information-valid (`siv`) field is set to 1. The `iv` and/or `siv`
 fields may be hardwired to 0 if the error record does not provide information in
@@ -643,7 +643,7 @@ property is unconditionally true for a hardware unit then this field may be
 hardwired to 1. For error classes other than CE, the interpretation of the `c`
 bit may be specified in a future standard extension.
 
-The error-code (`ec`) is a WARL field holds an error code that provides a
+The error-code (`ec`) is a WARL field that holds an error code that provides a
 description of the detected error. Standard `ec` encodings are defined in
 <<EC_ENCODINGS>>. If an error record detects an error that does not correspond
 to a standard `ec` encoding then such errors may be reported using a custom
@@ -652,8 +652,8 @@ differentiate them from the standard encodings.
 
 The read-in-progress (`rdip`) field is set to 1 by hardware when a new error is
 recorded in an invalid status register and is cleared to 0 by hardware when a
-valid status register is overwritten. When `control_i.sinv` field is written to
-1, the `v` field is cleared to 0 only if `rdip` field is 1. Gating the clearing
+valid status register is overwritten. When the `control_i.sinv` field is written to
+1, the `v` field is cleared to 0 only if the `rdip` field is 1. Gating the clearing
 of the `v` field by the `rdip` field being 1 allows software to detect an
 overwrite that may occur while it is in process of reading an error record.
 
@@ -673,7 +673,7 @@ increment the `cec` only if the error is not identical to a previously reported
 CE.
 
 Some hardware units may implement low pass filters (e.g., leaky buckets) that
-throttle the rate which CE are reported and counted.
+throttle the rate at which CE are reported and counted.
 ====
 
 <<<
@@ -779,7 +779,7 @@ due to an earlier detected error that has not yet been consumed by software.
 
 The overwrite rules allow a higher severity error to overwrite a lower severity
 error. UEC has the highest severity, followed by UED, and then CE. When the two
-errors have same severity the priority of the errors (as determined by
+errors have the same severity the priority of the errors (as determined by
 `status_i.pri`) is used to determine if the error record is overwritten. Higher
 priority errors overwrite the lower priority errors. When a error record is
 overwritten by a higher severity error (UED/CE by UEC, UED by UEC, or CE by
@@ -871,7 +871,7 @@ error. And yet another implementation may choose to record one of the errors as
 determined by implementation specific rules.
 ====
 
-When a new error is recorded by the hardware unit in `status_i` register of its
+When a new error is recorded by the hardware unit in the `status_i` register of its
 error record then the signal configured in the `control_i` register for error is
 asserted.