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SAIL Support: Vector instructions #26

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6 tasks
ben-marshall opened this issue Aug 13, 2020 · 1 comment
Closed
6 tasks

SAIL Support: Vector instructions #26

ben-marshall opened this issue Aug 13, 2020 · 1 comment
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help wanted Extra attention is needed SAIL Anything to do with the SAIL formal model.

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@ben-marshall
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ben-marshall commented Aug 13, 2020 •
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There is currently no support in the base SAIL model for the vector instruction set. Formal modelling of the vector crypto instructions is blocked by this. Instead, we aim to create "mocked" SAIL support for the vector crypto instructions. These mocked descriptions will appear in the specification. When the base vector extension is supported by SAIL, these functions simply need glue code around them to extract inputs from the vector registers and return their outputs.

Instruction Models Completed:

  • AES Single Round
  • AES All Rounds
  • SHA256 Single Round
  • SHA256 All Rounds
  • SHA512 Single Round
  • SHA512 All Rounds
@ben-marshall ben-marshall added the SAIL Anything to do with the SAIL formal model. label Aug 13, 2020
@ben-marshall ben-marshall mentioned this issue Aug 13, 2020
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@ben-marshall ben-marshall added the help wanted Extra attention is needed label Aug 13, 2020
ben-marshall added a commit that referenced this issue Aug 14, 2020
@ben-marshall
sail: Mock functions for vector state access.
9f86991 
- Added some mock functions for vector extension register access and
  constant access.

  - Get/Set elements of 128 bits

  - Get number of elements to work on.

- See #24, #26

 On branch dev/next-release
 Your branch is ahead of 'origin/dev/next-release' by 4 commits.
   (use "git push" to publish your local commits)

 Changes to be committed:
	modified:   sail/riscv_types_crypto.sail

 Changes not staged for commit:
	modified:   bin/parse_opcodes.py
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)

 Untracked files:
	sail/riscv_insts_crypto_rvv_aes.sail
	sail/riscv_insts_crypto_rvv_alu.sail
	sail/riscv_insts_crypto_rvv_sha.sail
ben-marshall added a commit that referenced this issue Aug 14, 2020
@ben-marshall
sail: boilerplate for vector sha2 instructions.
23755db 
- See #23, #26

 On branch dev/next-release
 Your branch is ahead of 'origin/dev/next-release' by 5 commits.
   (use "git push" to publish your local commits)

 Changes to be committed:
	new file:   sail/riscv_insts_crypto_rvv_sha.sail

 Changes not staged for commit:
	modified:   bin/parse_opcodes.py
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)

 Untracked files:
	sail/riscv_insts_crypto_rvv_aes.sail
	sail/riscv_insts_crypto_rvv_alu.sail
ben-marshall added a commit that referenced this issue Aug 14, 2020
@ben-marshall
sail: boilerplate for vector alu instructions.
0474cef 
- CLMUL, Rotate, Grev.

- See #26.

 On branch dev/next-release
 Your branch is ahead of 'origin/dev/next-release' by 6 commits.
   (use "git push" to publish your local commits)

 Changes to be committed:
	new file:   sail/riscv_insts_crypto_rvv_alu.sail

 Changes not staged for commit:
	modified:   bin/parse_opcodes.py
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)

 Untracked files:
	sail/riscv_insts_crypto_rvv_aes.sail
ben-marshall added a commit that referenced this issue Aug 14, 2020
@ben-marshall
sail: parse_opcodes support for sail vector fields. #26
2ff9d49
ben-marshall added a commit that referenced this issue Aug 18, 2020
@ben-marshall
sail: still working on vector AES. See #24,#26
115114f
@ben-marshall
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Closing this issue prematurely, as it is covered by several other smaller issues:

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