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Fix condition check which assume 0 == invalid.
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Rot127 committed Oct 14, 2023
1 parent 14c73d2 commit 82d0fec
Showing 1 changed file with 10 additions and 6 deletions.
16 changes: 10 additions & 6 deletions librz/analysis/p/analysis_arm_cs.c
Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,14 @@ static const char *vector_data_type_name(arm_vectordata_type type) {
}
}

static bool cc_holds_cond(CS_aarch64_cc() cc) {
#if CS_NEXT_VERSION >= 6
return (cc != CS_AARCH64CC(_Invalid) && cc != CS_AARCH64CC(_AL) && cc != CS_AARCH64CC(_NV));
#else
return (cc != CS_AARCH64CC(_INVALID) && cc != CS_AARCH64CC(_AL) && cc != CS_AARCH64CC(_NV));
#endif
}

static void opex(RzStrBuf *buf, csh handle, cs_insn *insn) {
int i;
PJ *pj = pj_new();
Expand Down Expand Up @@ -551,11 +559,7 @@ static void opex64(RzStrBuf *buf, csh handle, cs_insn *insn) {
#endif
pj_kb(pj, "writeback", true);
}
#if CS_NEXT_VERSION < 6
if (x->cc != CS_AARCH64CC(_INVALID) && x->cc != CS_AARCH64CC(_AL) && x->cc != CS_AARCH64CC(_NV)) {
#else
if (x->cc != CS_AARCH64CC(_AL) && x->cc != CS_AARCH64CC(_NV)) {
#endif
if (cc_holds_cond(x->cc)) {
pj_ks(pj, "cc", cc_name64(x->cc));
}
pj_end(pj);
Expand Down Expand Up @@ -1080,7 +1084,7 @@ static void anop64(ArmCSContext *ctx, RzAnalysisOp *op, cs_insn *insn) {
// BX LR == RET
if (insn->detail->CS_aarch64().operands[0].reg == CS_AARCH64(_REG_LR)) {
op->type = RZ_ANALYSIS_OP_TYPE_RET;
} else if (insn->detail->CS_aarch64().cc) {
} else if (cc_holds_cond(insn->detail->CS_aarch64().cc)) {
op->type = RZ_ANALYSIS_OP_TYPE_CJMP;
op->jump = IMM64(0);
op->fail = addr + op->size;
Expand Down

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