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v0.1.20: Implement RV32 instructions (#28)

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@github-actions github-actions released this 01 Aug 19:42
606f33b
* README.md: Fix call to kriscv run

* Check output of run_pattern for better error messages

* Fix >>aWord and >>lWord to account for >>Int requiring infinite sign extension to properly do an arithmetic shift

* Sign extend the LUI immediate for when XLEN > 32

* Update CHECK_HALT rules to only apply when we haven't halted already

* Add macros for simple tests

* Refactor simple tests to have a YAML assertion file instead of the full configuration output

* Fold addi-overflow.S into addi.S

* Implement SLTI and SLTIU

* Implement ANDI, ORI, and XORI

* Implement SLLI, SRLI, and SRAI

* Implement AUIPC and ADD

* Implement SUB, SLT, SLTU, AND, OR, and XOR

* Implement SLL, SRL, and SRA

* Implement JAL

* Implement JALR

* Implement BEQ, BNE, BLT, BGE, BLTU, and BGEU

* Implement LB, LH, LW, LBU, LHU, SB, SH, and SW

* Implement FENCE, FENCE.TSO, ECALL, and EBREAK

* Refactor the halting mechanism to make it possible to cleanly halt at any point, as will be necessary for, e.g., illegal instruction exceptions.

* Pull the PC increment out into a separate pipeline step

* Use a branchPC function for branch instrs rather than two separate rules

* Set Version: 0.1.20

* Add comments explaining why the arithmetic >>Int is used to implement the logical >>lWord

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Co-authored-by: devops <devops@runtimeverification.com>