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[ARMv6-M] initialize the LR register #292
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the ARMv6-M Architecture Reference Manual (ARM DDI 0419D) indicates in section B1.5.5 "Reset behavior" that the LR (Link Register) starts in an unknown state when the Reset handler is taken and that its "Value must be initialised by software" So this PR does that: it initializes the LR register to 0xFFFF_FFFF (-1) first thing in the Reset handler (only for v6). The manual doesn't say which value to use so I decided to use the value used by the ARMv7-M (v7 sets LR to 0xFFFF_FFFF before invoking the Reset handler; see its Architecture Manual for details). The values of LR (these are pushed onto the stack in function preludes) are used to unwind the stack (e.g. GDB's `backtrace` or a future `cortex_m_panic_unwind` handler). Having the initial stack frame use a known value on all Cortex-M variants makes it easier to implement `panic_unwind` and avoids virtual unwinders like GDB `backtrace` trying to unwind beyond the `Reset` handler Note that this implementation uses a trampoline that runs before `Reset` to set LR on v6. This is required because the prelude of the `Reset` routine will push LR onto the stack; we want that LR value to be -1. Calling `register::lr::write` from `Reset` would perform the write after LR has been pushed onto the stack and that's too late
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r? @therealprof (rust_highfive has picked a reviewer for you, use r? to override) |
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jonas-schievink
approved these changes
Sep 2, 2020
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PR against the main branch: #293 |
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293: [ARMv6-M] initialize the LR register r=therealprof a=japaric NOTE: same as PR #292 the ARMv6-M Architecture Reference Manual (ARM DDI 0419D) indicates in section B1.5.5 "Reset behavior" that the LR (Link Register) starts in an unknown state when the Reset handler is taken and that its "Value must be initialised by software" So this PR does that: it initializes the LR register to 0xFFFF_FFFF (-1) first thing in the Reset handler (only for v6). The manual doesn't say which value to use so I decided to use the value used by the ARMv7-M (v7 sets LR to 0xFFFF_FFFF before invoking the Reset handler; see its Architecture Manual for details). The values of LR (these are pushed onto the stack in function preludes) are used to unwind the stack (e.g. GDB's `backtrace` or a future `cortex_m_panic_unwind` handler). Having the initial stack frame use a known value on all Cortex-M variants makes it easier to implement `panic_unwind` and avoids virtual unwinders like GDB `backtrace` trying to unwind beyond the `Reset` handler Note that this implementation uses a trampoline that runs before `Reset` to set LR on v6. This is required because the prelude of the `Reset` routine will push LR onto the stack; we want that LR value to be -1. Calling `register::lr::write` from `Reset` would perform the write after LR has been pushed onto the stack and that's too late Co-authored-by: Jorge Aparicio <jorge.aparicio@ferrous-systems.com>
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bors r+ |
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292: [ARMv6-M] initialize the LR register r=jonas-schievink a=japaric the ARMv6-M Architecture Reference Manual (ARM DDI 0419D) indicates in section B1.5.5 "Reset behavior" that the LR (Link Register) starts in an unknown state when the Reset handler is taken and that its "Value must be initialised by software" So this PR does that: it initializes the LR register to 0xFFFF_FFFF (-1) first thing in the Reset handler (only for v6). The manual doesn't say which value to use so I decided to use the value used by the ARMv7-M (v7 sets LR to 0xFFFF_FFFF before invoking the Reset handler; see its Architecture Manual for details). The values of LR (these are pushed onto the stack in function preludes) are used to unwind the stack (e.g. GDB's `backtrace` or a future `cortex_m_panic_unwind` handler). Having the initial stack frame use a known value on all Cortex-M variants makes it easier to implement `panic_unwind` and avoids virtual unwinders like GDB `backtrace` trying to unwind beyond the `Reset` handler Note that this implementation uses a trampoline that runs before `Reset` to set LR on v6. This is required because the prelude of the `Reset` routine will push LR onto the stack; we want that LR value to be -1. Calling `register::lr::write` from `Reset` would perform the write after LR has been pushed onto the stack and that's too late *NOTE* this is a PR against v0.6.x. I'm using that branch as 0.6.x is the latest minor release. I can open a PR against master after this one has been approved. Co-authored-by: Jorge Aparicio <jorge.aparicio@ferrous-systems.com>
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Build failed: |
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Gah!
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bors r+ |
bors bot
added a commit
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Sep 2, 2020
292: [ARMv6-M] initialize the LR register r=therealprof a=japaric the ARMv6-M Architecture Reference Manual (ARM DDI 0419D) indicates in section B1.5.5 "Reset behavior" that the LR (Link Register) starts in an unknown state when the Reset handler is taken and that its "Value must be initialised by software" So this PR does that: it initializes the LR register to 0xFFFF_FFFF (-1) first thing in the Reset handler (only for v6). The manual doesn't say which value to use so I decided to use the value used by the ARMv7-M (v7 sets LR to 0xFFFF_FFFF before invoking the Reset handler; see its Architecture Manual for details). The values of LR (these are pushed onto the stack in function preludes) are used to unwind the stack (e.g. GDB's `backtrace` or a future `cortex_m_panic_unwind` handler). Having the initial stack frame use a known value on all Cortex-M variants makes it easier to implement `panic_unwind` and avoids virtual unwinders like GDB `backtrace` trying to unwind beyond the `Reset` handler Note that this implementation uses a trampoline that runs before `Reset` to set LR on v6. This is required because the prelude of the `Reset` routine will push LR onto the stack; we want that LR value to be -1. Calling `register::lr::write` from `Reset` would perform the write after LR has been pushed onto the stack and that's too late *NOTE* this is a PR against v0.6.x. I'm using that branch as 0.6.x is the latest minor release. I can open a PR against master after this one has been approved. Co-authored-by: Jorge Aparicio <jorge.aparicio@ferrous-systems.com>
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Build failed: |
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Hm, genuine error: No idea why though. |
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rustc error changed, and we don't run CI on PRs to the v0.6.x branch so we didn't see the failure earlier |
jonas-schievink
approved these changes
Sep 4, 2020
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Huh? Why didn't that dismiss the previous review. Will check the configuration. |
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Build succeeded: |
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the ARMv6-M Architecture Reference Manual (ARM DDI 0419D) indicates in section
B1.5.5 "Reset behavior" that the LR (Link Register) starts in an unknown state
when the Reset handler is taken and that its "Value must be initialised by
software"
So this PR does that: it initializes the LR register to 0xFFFF_FFFF (-1) first
thing in the Reset handler (only for v6). The manual doesn't say which value to
use so I decided to use the value used by the ARMv7-M (v7 sets LR to 0xFFFF_FFFF
before invoking the Reset handler; see its Architecture Manual for details).
The values of LR (these are pushed onto the stack in function preludes) are used
to unwind the stack (e.g. GDB's
backtraceor a futurecortex_m_panic_unwindhandler). Having the initial stack frame use a known value on all Cortex-M
variants makes it easier to implement
panic_unwindand avoids virtualunwinders like GDB
backtracetrying to unwind beyond theResethandlerNote that this implementation uses a trampoline that runs before
Resetto setLR on v6. This is required because the prelude of the
Resetroutine will pushLR onto the stack; we want that LR value to be -1. Calling
register::lr::writefrom
Resetwould perform the write after LR has been pushed onto the stack andthat's too late
NOTE this is a PR against v0.6.x. I'm using that branch as 0.6.x is the latest minor release. I can open a PR against master after this one has been approved.