Move llvm.x86.* shims into shims::x86 and implement _addcarry_u32 and _subborrow_u{32,64}
#3075
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☔ The latest upstream changes (presumably #3072) made this pull request unmergeable. Please resolve the merge conflicts. |
| { | ||
| let [] = this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?; | ||
| this.yield_active_thread(); | ||
| } | ||
| "llvm.aarch64.isb" if this.tcx.sess.target.arch == "aarch64" => { |
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| "llvm.aarch64.isb" if this.tcx.sess.target.arch == "aarch64" => { | |
| // FIXME: Move these to an `arm` submodule. | |
| "llvm.aarch64.isb" if this.tcx.sess.target.arch == "aarch64" => { |
tests/pass/intrinsics-x86.rs
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| pub fn main() { | ||
| assert_eq!(adc(0, 1, 1), (0, 2)); | ||
| assert_eq!(adc(1, 1, 1), (0, 3)); | ||
| assert_eq!(adc(2, 1, 1), (0, 3)); |
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| assert_eq!(adc(2, 1, 1), (0, 3)); | |
| assert_eq!(adc(2, 1, 1), (0, 3)); // any non-zero carry acts as 1! |
| @@ -1,3 +1,51 @@ | |||
| #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] | |||
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Ah, here's another way to handle tests that should run only on x86. Might be good to also port the other tests (that use the long ignore- list) to this pattern.
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For SSE and SSE2 that will work fine because they are enabled by default. But other features require -C target-feature=+feature, which will generate warnings on non-x86.
Maybe a new directive could be added to compiletest ui_test? Something like @only-x86-family
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I've done it for SSE and SSE2 for the time being.
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It looks to me like you addressed Ralf's comments above but GitHub doesn't seem to have noticed 🤔 |
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@eduardosm Can you squash the commits down a bit? I think your original 4 commits are a good organization, but the rest don't stand on their own. Then this LGTM (and I would rather like to sync these changes into rust-lang/rust). |
…` to make it generic
The input carry is an 8-bit value that is interpreted as 1 when it is non-zero. The output carry is an 8-bit value that will be 0 or 1. https://www.intel.com/content/www/us/en/docs/cpp-compiler/developer-guide-reference/2021-8/addcarry-u32-addcarry-u64.html
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Ready! |
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@bors r+ |
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☀️ Test successful - checks-actions |
This PR moves all
llvm.x86.*shims intoshims::x86and addsllvm.x86.addcarry.32,llvm.x86.subborrow.32andllvm.x86.subborrow.64.Additionally, it fixes the input carry semantics of
llvm.x86.addcarry.32. The input carry is an 8-bit value that is interpreted as 1 when it is non-zero.https://www.intel.com/content/www/us/en/docs/cpp-compiler/developer-guide-reference/2021-8/addcarry-u32-addcarry-u64.html