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Remove unnecessary unsafe code in Arc deferred initialization examp…
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…les.
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JakobDegen committed Jan 20, 2022
1 parent 7bc47cf commit 4de7618
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Showing 2 changed files with 42 additions and 58 deletions.
50 changes: 21 additions & 29 deletions library/alloc/src/rc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -451,12 +451,10 @@ impl<T> Rc<T> {
///
/// let mut five = Rc::<u32>::new_uninit();
///
/// let five = unsafe {
/// // Deferred initialization:
/// Rc::get_mut_unchecked(&mut five).as_mut_ptr().write(5);
/// // Deferred initialization:
/// Rc::get_mut(&mut five).unwrap().write(5);
///
/// five.assume_init()
/// };
/// let five = unsafe { five.assume_init() };
///
/// assert_eq!(*five, 5)
/// ```
Expand Down Expand Up @@ -543,12 +541,10 @@ impl<T> Rc<T> {
///
/// let mut five = Rc::<u32>::try_new_uninit()?;
///
/// let five = unsafe {
/// // Deferred initialization:
/// Rc::get_mut_unchecked(&mut five).as_mut_ptr().write(5);
/// // Deferred initialization:
/// Rc::get_mut(&mut five).unwrap().write(5);
///
/// five.assume_init()
/// };
/// let five = unsafe { five.assume_init() };
///
/// assert_eq!(*five, 5);
/// # Ok::<(), std::alloc::AllocError>(())
Expand Down Expand Up @@ -660,14 +656,13 @@ impl<T> Rc<[T]> {
///
/// let mut values = Rc::<[u32]>::new_uninit_slice(3);
///
/// let values = unsafe {
/// // Deferred initialization:
/// Rc::get_mut_unchecked(&mut values)[0].as_mut_ptr().write(1);
/// Rc::get_mut_unchecked(&mut values)[1].as_mut_ptr().write(2);
/// Rc::get_mut_unchecked(&mut values)[2].as_mut_ptr().write(3);
/// // Deferred initialization:
/// let data = Rc::get_mut(&mut values).unwrap();
/// data[0].write(1);
/// data[1].write(2);
/// data[2].write(3);
///
/// values.assume_init()
/// };
/// let values = unsafe { values.assume_init() };
///
/// assert_eq!(*values, [1, 2, 3])
/// ```
Expand Down Expand Up @@ -738,12 +733,10 @@ impl<T> Rc<mem::MaybeUninit<T>> {
///
/// let mut five = Rc::<u32>::new_uninit();
///
/// let five = unsafe {
/// // Deferred initialization:
/// Rc::get_mut_unchecked(&mut five).as_mut_ptr().write(5);
/// // Deferred initialization:
/// Rc::get_mut(&mut five).unwrap().write(5);
///
/// five.assume_init()
/// };
/// let five = unsafe { five.assume_init() };
///
/// assert_eq!(*five, 5)
/// ```
Expand Down Expand Up @@ -777,14 +770,13 @@ impl<T> Rc<[mem::MaybeUninit<T>]> {
///
/// let mut values = Rc::<[u32]>::new_uninit_slice(3);
///
/// let values = unsafe {
/// // Deferred initialization:
/// Rc::get_mut_unchecked(&mut values)[0].as_mut_ptr().write(1);
/// Rc::get_mut_unchecked(&mut values)[1].as_mut_ptr().write(2);
/// Rc::get_mut_unchecked(&mut values)[2].as_mut_ptr().write(3);
/// // Deferred initialization:
/// let data = Rc::get_mut(&mut values).unwrap();
/// data[0].write(1);
/// data[1].write(2);
/// data[2].write(3);
///
/// values.assume_init()
/// };
/// let values = unsafe { values.assume_init() };
///
/// assert_eq!(*values, [1, 2, 3])
/// ```
Expand Down
50 changes: 21 additions & 29 deletions library/alloc/src/sync.rs
Original file line number Diff line number Diff line change
Expand Up @@ -437,12 +437,10 @@ impl<T> Arc<T> {
///
/// let mut five = Arc::<u32>::new_uninit();
///
/// let five = unsafe {
/// // Deferred initialization:
/// Arc::get_mut_unchecked(&mut five).as_mut_ptr().write(5);
/// // Deferred initialization:
/// Arc::get_mut(&mut five).unwrap().write(5);
///
/// five.assume_init()
/// };
/// let five = unsafe { five.assume_init() };
///
/// assert_eq!(*five, 5)
/// ```
Expand Down Expand Up @@ -545,12 +543,10 @@ impl<T> Arc<T> {
///
/// let mut five = Arc::<u32>::try_new_uninit()?;
///
/// let five = unsafe {
/// // Deferred initialization:
/// Arc::get_mut_unchecked(&mut five).as_mut_ptr().write(5);
/// // Deferred initialization:
/// Arc::get_mut(&mut five).unwrap().write(5);
///
/// five.assume_init()
/// };
/// let five = unsafe { five.assume_init() };
///
/// assert_eq!(*five, 5);
/// # Ok::<(), std::alloc::AllocError>(())
Expand Down Expand Up @@ -652,14 +648,13 @@ impl<T> Arc<[T]> {
///
/// let mut values = Arc::<[u32]>::new_uninit_slice(3);
///
/// let values = unsafe {
/// // Deferred initialization:
/// Arc::get_mut_unchecked(&mut values)[0].as_mut_ptr().write(1);
/// Arc::get_mut_unchecked(&mut values)[1].as_mut_ptr().write(2);
/// Arc::get_mut_unchecked(&mut values)[2].as_mut_ptr().write(3);
/// // Deferred initialization:
/// let data = Arc::get_mut(&mut values).unwrap();
/// data[0].write(1);
/// data[1].write(2);
/// data[2].write(3);
///
/// values.assume_init()
/// };
/// let values = unsafe { values.assume_init() };
///
/// assert_eq!(*values, [1, 2, 3])
/// ```
Expand Down Expand Up @@ -730,12 +725,10 @@ impl<T> Arc<mem::MaybeUninit<T>> {
///
/// let mut five = Arc::<u32>::new_uninit();
///
/// let five = unsafe {
/// // Deferred initialization:
/// Arc::get_mut_unchecked(&mut five).as_mut_ptr().write(5);
/// // Deferred initialization:
/// Arc::get_mut(&mut five).unwrap().write(5);
///
/// five.assume_init()
/// };
/// let five = unsafe { five.assume_init() };
///
/// assert_eq!(*five, 5)
/// ```
Expand Down Expand Up @@ -770,14 +763,13 @@ impl<T> Arc<[mem::MaybeUninit<T>]> {
///
/// let mut values = Arc::<[u32]>::new_uninit_slice(3);
///
/// let values = unsafe {
/// // Deferred initialization:
/// Arc::get_mut_unchecked(&mut values)[0].as_mut_ptr().write(1);
/// Arc::get_mut_unchecked(&mut values)[1].as_mut_ptr().write(2);
/// Arc::get_mut_unchecked(&mut values)[2].as_mut_ptr().write(3);
/// // Deferred initialization:
/// let data = Arc::get_mut(&mut values).unwrap();
/// data[0].write(1);
/// data[1].write(2);
/// data[2].write(3);
///
/// values.assume_init()
/// };
/// let values = unsafe { values.assume_init() };
///
/// assert_eq!(*values, [1, 2, 3])
/// ```
Expand Down

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