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Auto merge of #101064 - compiler-errors:rollup-fwm5m5f, r=compiler-er…
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…rors

Rollup of 9 pull requests

Successful merges:

 - #100724 (Migrate ast lowering to session diagnostic)
 - #100735 (Migrate `rustc_ty_utils` to `SessionDiagnostic`)
 - #100738 (Diagnostics migr const eval)
 - #100744 (Migrate rustc_mir_dataflow to diagnostic structs)
 - #100776 (Migrate `rustc_lint` errors to `SessionDiagnostic`)
 - #100817 (sugg: suggest the usage of boolean value when there is a typo in the keyword)
 - #100836 (Migrate `rustc_attr` crate diagnostics)
 - #100890 (Migrate rustc_driver to SessionDiagnostic)
 - #100900 (on `region_errors.rs`)

Failed merges:

 - #100831 (Migrate `symbol_mangling` module to new diagnostics structs)

r? `@ghost`
`@rustbot` modify labels: rollup
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@bors
bors committed Aug 27, 2022
2 parents 2b443a8 + 96ceadd commit bb8a08f
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Showing 51 changed files with 2,445 additions and 927 deletions.
6 changes: 6 additions & 0 deletions Cargo.lock
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Original file line number Diff line number Diff line change
Expand Up @@ -3574,6 +3574,7 @@ dependencies = [
"rustc_errors",
"rustc_hir",
"rustc_index",
"rustc_macros",
"rustc_middle",
"rustc_query_system",
"rustc_session",
Expand Down Expand Up @@ -3819,6 +3820,7 @@ dependencies = [
"rustc_interface",
"rustc_lint",
"rustc_log",
"rustc_macros",
"rustc_metadata",
"rustc_middle",
"rustc_parse",
Expand Down Expand Up @@ -4212,11 +4214,14 @@ dependencies = [
"regex",
"rustc_ast",
"rustc_data_structures",
"rustc_errors",
"rustc_graphviz",
"rustc_hir",
"rustc_index",
"rustc_macros",
"rustc_middle",
"rustc_serialize",
"rustc_session",
"rustc_span",
"rustc_target",
"smallvec",
Expand Down Expand Up @@ -4600,6 +4605,7 @@ dependencies = [
"rustc_hir",
"rustc_index",
"rustc_infer",
"rustc_macros",
"rustc_middle",
"rustc_session",
"rustc_span",
Expand Down
1 change: 1 addition & 0 deletions compiler/rustc_ast_lowering/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -15,6 +15,7 @@ rustc_target = { path = "../rustc_target" }
rustc_data_structures = { path = "../rustc_data_structures" }
rustc_index = { path = "../rustc_index" }
rustc_middle = { path = "../rustc_middle" }
rustc_macros = { path = "../rustc_macros" }
rustc_query_system = { path = "../rustc_query_system" }
rustc_span = { path = "../rustc_span" }
rustc_errors = { path = "../rustc_errors" }
Expand Down
179 changes: 74 additions & 105 deletions compiler/rustc_ast_lowering/src/asm.rs
View file
Original file line number Diff line number Diff line change
@@ -1,11 +1,17 @@
use crate::{ImplTraitContext, ImplTraitPosition, ParamMode, ResolverAstLoweringExt};

use super::errors::{
AbiSpecifiedMultipleTimes, AttSyntaxOnlyX86, ClobberAbiNotSupported,
InlineAsmUnsupportedTarget, InvalidAbiClobberAbi, InvalidAsmTemplateModifierConst,
InvalidAsmTemplateModifierRegClass, InvalidAsmTemplateModifierRegClassSub,
InvalidAsmTemplateModifierSym, InvalidRegister, InvalidRegisterClass, RegisterClassOnlyClobber,
RegisterConflict,
};
use super::LoweringContext;

use rustc_ast::ptr::P;
use rustc_ast::*;
use rustc_data_structures::fx::{FxHashMap, FxHashSet};
use rustc_errors::struct_span_err;
use rustc_hir as hir;
use rustc_hir::def::{DefKind, Res};
use rustc_hir::definitions::DefPathData;
Expand All @@ -26,13 +32,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
let asm_arch =
if self.tcx.sess.opts.actually_rustdoc { None } else { self.tcx.sess.asm_arch };
if asm_arch.is_none() && !self.tcx.sess.opts.actually_rustdoc {
struct_span_err!(
self.tcx.sess,
sp,
E0472,
"inline assembly is unsupported on this target"
)
.emit();
self.tcx.sess.emit_err(InlineAsmUnsupportedTarget { span: sp });
}
if let Some(asm_arch) = asm_arch {
// Inline assembly is currently only stable for these architectures.
Expand All @@ -59,10 +59,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
&& !matches!(asm_arch, Some(asm::InlineAsmArch::X86 | asm::InlineAsmArch::X86_64))
&& !self.tcx.sess.opts.actually_rustdoc
{
self.tcx
.sess
.struct_span_err(sp, "the `att_syntax` option is only supported on x86")
.emit();
self.tcx.sess.emit_err(AttSyntaxOnlyX86 { span: sp });
}
if asm.options.contains(InlineAsmOptions::MAY_UNWIND) && !self.tcx.features().asm_unwind {
feature_err(
Expand All @@ -82,51 +79,37 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
// If the abi was already in the list, emit an error
match clobber_abis.get(&abi) {
Some((prev_name, prev_sp)) => {
let mut err = self.tcx.sess.struct_span_err(
*abi_span,
&format!("`{}` ABI specified multiple times", prev_name),
);
err.span_label(*prev_sp, "previously specified here");

// Multiple different abi names may actually be the same ABI
// If the specified ABIs are not the same name, alert the user that they resolve to the same ABI
let source_map = self.tcx.sess.source_map();
if source_map.span_to_snippet(*prev_sp)
!= source_map.span_to_snippet(*abi_span)
{
err.note("these ABIs are equivalent on the current target");
}
let equivalent = (source_map.span_to_snippet(*prev_sp)
!= source_map.span_to_snippet(*abi_span))
.then_some(());

err.emit();
self.tcx.sess.emit_err(AbiSpecifiedMultipleTimes {
abi_span: *abi_span,
prev_name: *prev_name,
prev_span: *prev_sp,
equivalent,
});
}
None => {
clobber_abis.insert(abi, (abi_name, *abi_span));
clobber_abis.insert(abi, (*abi_name, *abi_span));
}
}
}
Err(&[]) => {
self.tcx
.sess
.struct_span_err(
*abi_span,
"`clobber_abi` is not supported on this target",
)
.emit();
self.tcx.sess.emit_err(ClobberAbiNotSupported { abi_span: *abi_span });
}
Err(supported_abis) => {
let mut err = self
.tcx
.sess
.struct_span_err(*abi_span, "invalid ABI for `clobber_abi`");
let mut abis = format!("`{}`", supported_abis[0]);
for m in &supported_abis[1..] {
let _ = write!(abis, ", `{}`", m);
}
err.note(&format!(
"the following ABIs are supported on this target: {}",
abis
));
err.emit();
self.tcx.sess.emit_err(InvalidAbiClobberAbi {
abi_span: *abi_span,
supported_abis: abis,
});
}
}
}
Expand All @@ -141,24 +124,28 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
.iter()
.map(|(op, op_sp)| {
let lower_reg = |reg| match reg {
InlineAsmRegOrRegClass::Reg(s) => {
InlineAsmRegOrRegClass::Reg(reg) => {
asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
asm::InlineAsmReg::parse(asm_arch, s).unwrap_or_else(|e| {
let msg = format!("invalid register `{}`: {}", s, e);
sess.struct_span_err(*op_sp, &msg).emit();
asm::InlineAsmReg::parse(asm_arch, reg).unwrap_or_else(|error| {
sess.emit_err(InvalidRegister { op_span: *op_sp, reg, error });
asm::InlineAsmReg::Err
})
} else {
asm::InlineAsmReg::Err
})
}
InlineAsmRegOrRegClass::RegClass(s) => {
InlineAsmRegOrRegClass::RegClass(reg_class) => {
asm::InlineAsmRegOrRegClass::RegClass(if let Some(asm_arch) = asm_arch {
asm::InlineAsmRegClass::parse(asm_arch, s).unwrap_or_else(|e| {
let msg = format!("invalid register class `{}`: {}", s, e);
sess.struct_span_err(*op_sp, &msg).emit();
asm::InlineAsmRegClass::Err
})
asm::InlineAsmRegClass::parse(asm_arch, reg_class).unwrap_or_else(
|error| {
sess.emit_err(InvalidRegisterClass {
op_span: *op_sp,
reg_class,
error,
});
asm::InlineAsmRegClass::Err
},
)
} else {
asm::InlineAsmRegClass::Err
})
Expand Down Expand Up @@ -282,50 +269,39 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
}
let valid_modifiers = class.valid_modifiers(asm_arch.unwrap());
if !valid_modifiers.contains(&modifier) {
let mut err = sess.struct_span_err(
placeholder_span,
"invalid asm template modifier for this register class",
);
err.span_label(placeholder_span, "template modifier");
err.span_label(op_sp, "argument");
if !valid_modifiers.is_empty() {
let sub = if !valid_modifiers.is_empty() {
let mut mods = format!("`{}`", valid_modifiers[0]);
for m in &valid_modifiers[1..] {
let _ = write!(mods, ", `{}`", m);
}
err.note(&format!(
"the `{}` register class supports \
the following template modifiers: {}",
class.name(),
mods
));
InvalidAsmTemplateModifierRegClassSub::SupportModifier {
class_name: class.name(),
modifiers: mods,
}
} else {
err.note(&format!(
"the `{}` register class does not support template modifiers",
class.name()
));
}
err.emit();
InvalidAsmTemplateModifierRegClassSub::DoesNotSupportModifier {
class_name: class.name(),
}
};
sess.emit_err(InvalidAsmTemplateModifierRegClass {
placeholder_span,
op_span: op_sp,
sub,
});
}
}
hir::InlineAsmOperand::Const { .. } => {
let mut err = sess.struct_span_err(
sess.emit_err(InvalidAsmTemplateModifierConst {
placeholder_span,
"asm template modifiers are not allowed for `const` arguments",
);
err.span_label(placeholder_span, "template modifier");
err.span_label(op_sp, "argument");
err.emit();
op_span: op_sp,
});
}
hir::InlineAsmOperand::SymFn { .. }
| hir::InlineAsmOperand::SymStatic { .. } => {
let mut err = sess.struct_span_err(
sess.emit_err(InvalidAsmTemplateModifierSym {
placeholder_span,
"asm template modifiers are not allowed for `sym` arguments",
);
err.span_label(placeholder_span, "template modifier");
err.span_label(op_sp, "argument");
err.emit();
op_span: op_sp,
});
}
}
}
Expand All @@ -346,12 +322,10 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
// require that the operand name an explicit register, not a
// register class.
if reg_class.is_clobber_only(asm_arch.unwrap()) && !op.is_clobber() {
let msg = format!(
"register class `{}` can only be used as a clobber, \
not as an input or output",
reg_class.name()
);
sess.struct_span_err(op_sp, &msg).emit();
sess.emit_err(RegisterClassOnlyClobber {
op_span: op_sp,
reg_class_name: reg_class.name(),
});
continue;
}

Expand Down Expand Up @@ -391,16 +365,7 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
unreachable!();
};

let msg = format!(
"register `{}` conflicts with register `{}`",
reg.name(),
reg2.name()
);
let mut err = sess.struct_span_err(op_sp, &msg);
err.span_label(op_sp, &format!("register `{}`", reg.name()));
err.span_label(op_sp2, &format!("register `{}`", reg2.name()));

match (op, op2) {
let in_out = match (op, op2) {
(
hir::InlineAsmOperand::In { .. },
hir::InlineAsmOperand::Out { late, .. },
Expand All @@ -411,14 +376,18 @@ impl<'a, 'hir> LoweringContext<'a, 'hir> {
) => {
assert!(!*late);
let out_op_sp = if input { op_sp2 } else { op_sp };
let msg = "use `lateout` instead of \
`out` to avoid conflict";
err.span_help(out_op_sp, msg);
}
_ => {}
}
Some(out_op_sp)
},
_ => None,
};

err.emit();
sess.emit_err(RegisterConflict {
op_span1: op_sp,
op_span2: op_sp2,
reg1_name: reg.name(),
reg2_name: reg2.name(),
in_out
});
}
Entry::Vacant(v) => {
if r == reg {
Expand Down
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