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aapcs
calling convention isn't passed to LLVM
#37810
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japaric
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Nov 16, 2016
to actually use the AAPCS calling convention closes rust-lang#37810 This is technically a [breaking-change] because it changes the ABI of `extern "aapcs"` functions that (a) involve `f32`/`f64` arguments/return values and (b) are compiled for arm-eabihf targets from "aapcs-vfp" (wrong) to "aapcs" (correct). Appendix: What these ABIs mean? - In the "aapcs-vfp" ABI or "hard float" calling convention: Floating point values are passed/returned through FPU registers (s0, s1, d0, etc.) - Whereas, in the "aapcs" ABI or "soft float" calling convention: Floating point values are passed/returned through general purpose registers (r0, r1, etc.) Mixing these ABIs can cause problems if the caller assumes that the routine is using one of these ABIs but it's actually using the other one.
bors
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Nov 19, 2016
fix `extern "aapcs" fn` to actually use the AAPCS calling convention closes #37810 This is technically a [breaking-change] because it changes the ABI of `extern "aapcs"` functions that (a) involve `f32`/`f64` arguments/return values and (b) are compiled for arm-eabihf targets from "aapcs-vfp" (wrong) to "aapcs" (correct). Appendix: What these ABIs mean? - In the "aapcs-vfp" ABI or "hard float" calling convention: Floating point values are passed/returned through FPU registers (s0, s1, d0, etc.) - Whereas, in the "aapcs" ABI or "soft float" calling convention: Floating point values are passed/returned through general purpose registers (r0, r1, etc.) Mixing these ABIs can cause problems if the caller assumes that the routine is using one of these ABIs but it's actually using the other one. --- r? @alexcrichton We are going this `extern "aapcs" fn` thing to implement some intrinsics (floatundidf) for the eabihf targets in order to comply with LLVM's calling convention of intrinsics. Oh, and the value of the enum came from [here](http://llvm.org/docs/doxygen/html/namespacellvm_1_1CallingConv.html). cc @TimNN @parched
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As @TimNN pointed out currently the compiler does
which happens to work on arm soft float because they are the same but on hard float they are not the same.
While we are at we should add support for
aapcs-vfp
too.cc @japaric
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