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Miri subtree update #116307

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Oct 1, 2023
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18 changes: 14 additions & 4 deletions Cargo.lock
Original file line number Diff line number Diff line change
Expand Up @@ -2136,6 +2136,16 @@ dependencies = [
"winapi",
]

[[package]]
name = "libloading"
version = "0.8.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c571b676ddfc9a8c12f1f3d3085a7b163966a8fd8098a90640953ce5f6170161"
dependencies = [
"cfg-if",
"windows-sys 0.48.0",
]

[[package]]
name = "libm"
version = "0.1.4"
Expand Down Expand Up @@ -2411,7 +2421,7 @@ dependencies = [
"lazy_static",
"libc",
"libffi",
"libloading",
"libloading 0.8.1",
"log",
"measureme",
"rand",
Expand Down Expand Up @@ -3914,7 +3924,7 @@ dependencies = [
name = "rustc_interface"
version = "0.0.0"
dependencies = [
"libloading",
"libloading 0.7.4",
"rustc-rayon",
"rustc-rayon-core",
"rustc_ast",
Expand Down Expand Up @@ -4045,7 +4055,7 @@ name = "rustc_metadata"
version = "0.0.0"
dependencies = [
"bitflags 1.3.2",
"libloading",
"libloading 0.7.4",
"odht",
"rustc_ast",
"rustc_attr",
Expand Down Expand Up @@ -4260,7 +4270,7 @@ dependencies = [
name = "rustc_plugin_impl"
version = "0.0.0"
dependencies = [
"libloading",
"libloading 0.7.4",
"rustc_ast",
"rustc_errors",
"rustc_fluent_macro",
Expand Down
10 changes: 5 additions & 5 deletions src/tools/miri/Cargo.lock
Original file line number Diff line number Diff line change
Expand Up @@ -409,12 +409,12 @@ dependencies = [

[[package]]
name = "libloading"
version = "0.7.4"
version = "0.8.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "b67380fd3b2fbe7527a606e18729d21c6f3951633d0500574c4dc22d2d638b9f"
checksum = "d580318f95776505201b28cf98eb1fa5e4be3b689633ba6a3e6cd880ff22d8cb"
dependencies = [
"cfg-if",
"winapi",
"windows-sys 0.48.0",
]

[[package]]
Expand Down Expand Up @@ -947,9 +947,9 @@ dependencies = [

[[package]]
name = "ui_test"
version = "0.21.1"
version = "0.21.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "accffe020b57a6dd50014d457b5842c5a2ca73cd84f07d86d0a19c460a6509ae"
checksum = "aaf4bf7c184b8dfc7a4d3b90df789b1eb992ee42811cd115f32a7a1eb781058d"
dependencies = [
"annotate-snippets",
"anyhow",
Expand Down
2 changes: 1 addition & 1 deletion src/tools/miri/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ libc = "0.2"

[target.'cfg(target_os = "linux")'.dependencies]
libffi = "3.2.0"
libloading = "0.7"
libloading = "0.8"

[dev-dependencies]
colored = "2"
Expand Down
2 changes: 1 addition & 1 deletion src/tools/miri/rust-version
Original file line number Diff line number Diff line change
@@ -1 +1 @@
2ba4eb2d49e774b5fbc2a06258ac7b0f60b92b7e
bb6c66be3793ac5c738eeac91ecdc4b99388d0b4
4 changes: 2 additions & 2 deletions src/tools/miri/src/shims/intrinsics/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -325,7 +325,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {

"fmaf32" => {
let [a, b, c] = check_arg_count(args)?;
// FIXME: Using host floats, to work around https://github.com/rust-lang/miri/issues/2468.
// FIXME: Using host floats, to work around https://github.com/rust-lang/rustc_apfloat/issues/11
let a = f32::from_bits(this.read_scalar(a)?.to_u32()?);
let b = f32::from_bits(this.read_scalar(b)?.to_u32()?);
let c = f32::from_bits(this.read_scalar(c)?.to_u32()?);
Expand All @@ -335,7 +335,7 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {

"fmaf64" => {
let [a, b, c] = check_arg_count(args)?;
// FIXME: Using host floats, to work around https://github.com/rust-lang/miri/issues/2468.
// FIXME: Using host floats, to work around https://github.com/rust-lang/rustc_apfloat/issues/11
let a = f64::from_bits(this.read_scalar(a)?.to_u64()?);
let b = f64::from_bits(this.read_scalar(b)?.to_u64()?);
let c = f64::from_bits(this.read_scalar(c)?.to_u64()?);
Expand Down
12 changes: 9 additions & 3 deletions src/tools/miri/src/shims/intrinsics/simd.rs
Original file line number Diff line number Diff line change
Expand Up @@ -495,15 +495,21 @@ pub trait EvalContextExt<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
let (right, right_len) = this.operand_to_simd(right)?;
let (dest, dest_len) = this.place_to_simd(dest)?;

let index = generic_args[2].expect_const().eval(*this.tcx, this.param_env(), Some(this.tcx.span)).unwrap().unwrap_branch();
let index = generic_args[2]
.expect_const()
.eval(*this.tcx, this.param_env(), Some(this.tcx.span))
.unwrap()
.unwrap_branch();
let index_len = index.len();

assert_eq!(left_len, right_len);
assert_eq!(index_len as u64, dest_len);

for i in 0..dest_len {
let src_index: u64 = index[i as usize].unwrap_leaf()
.try_to_u32().unwrap()
let src_index: u64 = index[usize::try_from(i).unwrap()]
.unwrap_leaf()
.try_to_u32()
.unwrap()
.into();
let dest = this.project_index(&dest, i)?;

Expand Down
53 changes: 53 additions & 0 deletions src/tools/miri/src/shims/x86/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@ use shims::foreign_items::EmulateByNameResult;

mod sse;
mod sse2;
mod sse3;
mod ssse3;

impl<'mir, 'tcx: 'mir> EvalContextExt<'mir, 'tcx> for crate::MiriInterpCx<'mir, 'tcx> {}
pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
Expand Down Expand Up @@ -88,6 +90,16 @@ pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
this, link_name, abi, args, dest,
);
}
name if name.starts_with("sse3.") => {
return sse3::EvalContextExt::emulate_x86_sse3_intrinsic(
this, link_name, abi, args, dest,
);
}
name if name.starts_with("ssse3.") => {
return ssse3::EvalContextExt::emulate_x86_ssse3_intrinsic(
this, link_name, abi, args, dest,
);
}
_ => return Ok(EmulateByNameResult::NotSupported),
}
Ok(EmulateByNameResult::NeedsJumping)
Expand Down Expand Up @@ -286,3 +298,44 @@ fn bin_op_simd_float_all<'tcx, F: rustc_apfloat::Float>(

Ok(())
}

/// Horizontaly performs `which` operation on adjacent values of
/// `left` and `right` SIMD vectors and stores the result in `dest`.
fn horizontal_bin_op<'tcx>(
this: &mut crate::MiriInterpCx<'_, 'tcx>,
which: mir::BinOp,
saturating: bool,
left: &OpTy<'tcx, Provenance>,
right: &OpTy<'tcx, Provenance>,
dest: &PlaceTy<'tcx, Provenance>,
) -> InterpResult<'tcx, ()> {
let (left, left_len) = this.operand_to_simd(left)?;
let (right, right_len) = this.operand_to_simd(right)?;
let (dest, dest_len) = this.place_to_simd(dest)?;

assert_eq!(dest_len, left_len);
assert_eq!(dest_len, right_len);
assert_eq!(dest_len % 2, 0);

let middle = dest_len / 2;
for i in 0..dest_len {
// `i` is the index in `dest`
// `j` is the index of the 2-item chunk in `src`
let (j, src) =
if i < middle { (i, &left) } else { (i.checked_sub(middle).unwrap(), &right) };
// `base_i` is the index of the first item of the 2-item chunk in `src`
let base_i = j.checked_mul(2).unwrap();
let lhs = this.read_immediate(&this.project_index(src, base_i)?)?;
let rhs = this.read_immediate(&this.project_index(src, base_i.checked_add(1).unwrap())?)?;

let res = if saturating {
Immediate::from(this.saturating_arith(which, &lhs, &rhs)?)
} else {
*this.wrapping_binary_op(which, &lhs, &rhs)?
};

this.write_immediate(res, &this.project_index(&dest, i)?)?;
}

Ok(())
}
36 changes: 36 additions & 0 deletions src/tools/miri/src/shims/x86/sse2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -82,6 +82,42 @@ pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
this.write_immediate(*res, &dest)?;
}
}
// Used to implement the _mm_madd_epi16 function.
// Multiplies packed signed 16-bit integers in `left` and `right`, producing
// intermediate signed 32-bit integers. Horizontally add adjacent pairs of
// intermediate 32-bit integers, and pack the results in `dest`.
"pmadd.wd" => {
let [left, right] =
this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;

let (left, left_len) = this.operand_to_simd(left)?;
let (right, right_len) = this.operand_to_simd(right)?;
let (dest, dest_len) = this.place_to_simd(dest)?;

assert_eq!(left_len, right_len);
assert_eq!(dest_len.checked_mul(2).unwrap(), left_len);

for i in 0..dest_len {
let j1 = i.checked_mul(2).unwrap();
let left1 = this.read_scalar(&this.project_index(&left, j1)?)?.to_i16()?;
let right1 = this.read_scalar(&this.project_index(&right, j1)?)?.to_i16()?;

let j2 = j1.checked_add(1).unwrap();
let left2 = this.read_scalar(&this.project_index(&left, j2)?)?.to_i16()?;
let right2 = this.read_scalar(&this.project_index(&right, j2)?)?.to_i16()?;

let dest = this.project_index(&dest, i)?;

// Multiplications are i16*i16->i32, which will not overflow.
let mul1 = i32::from(left1).checked_mul(right1.into()).unwrap();
let mul2 = i32::from(left2).checked_mul(right2.into()).unwrap();
// However, this addition can overflow in the most extreme case
// (-0x8000)*(-0x8000)+(-0x8000)*(-0x8000) = 0x80000000
let res = mul1.wrapping_add(mul2);

this.write_scalar(Scalar::from_i32(res), &dest)?;
}
}
// Used to implement the _mm_mulhi_epi16 and _mm_mulhi_epu16 functions.
"pmulh.w" | "pmulhu.w" => {
let [left, right] =
Expand Down
90 changes: 90 additions & 0 deletions src/tools/miri/src/shims/x86/sse3.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,90 @@
use rustc_middle::mir;
use rustc_span::Symbol;
use rustc_target::abi::Align;
use rustc_target::spec::abi::Abi;

use super::horizontal_bin_op;
use crate::*;
use shims::foreign_items::EmulateByNameResult;

impl<'mir, 'tcx: 'mir> EvalContextExt<'mir, 'tcx> for crate::MiriInterpCx<'mir, 'tcx> {}
pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
crate::MiriInterpCxExt<'mir, 'tcx>
{
fn emulate_x86_sse3_intrinsic(
&mut self,
link_name: Symbol,
abi: Abi,
args: &[OpTy<'tcx, Provenance>],
dest: &PlaceTy<'tcx, Provenance>,
) -> InterpResult<'tcx, EmulateByNameResult<'mir, 'tcx>> {
let this = self.eval_context_mut();
// Prefix should have already been checked.
let unprefixed_name = link_name.as_str().strip_prefix("llvm.x86.sse3.").unwrap();

match unprefixed_name {
// Used to implement the _mm_addsub_ps and _mm_addsub_pd functions.
// Alternatingly add and subtract floating point (f32 or f64) from
// `left` and `right`
"addsub.ps" | "addsub.pd" => {
let [left, right] =
this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;

let (left, left_len) = this.operand_to_simd(left)?;
let (right, right_len) = this.operand_to_simd(right)?;
let (dest, dest_len) = this.place_to_simd(dest)?;

assert_eq!(dest_len, left_len);
assert_eq!(dest_len, right_len);

for i in 0..dest_len {
let left = this.read_immediate(&this.project_index(&left, i)?)?;
let right = this.read_immediate(&this.project_index(&right, i)?)?;
let dest = this.project_index(&dest, i)?;

// Even elements are subtracted and odd elements are added.
let op = if i % 2 == 0 { mir::BinOp::Sub } else { mir::BinOp::Add };
let res = this.wrapping_binary_op(op, &left, &right)?;

this.write_immediate(*res, &dest)?;
}
}
// Used to implement the _mm_h{add,sub}_p{s,d} functions.
// Horizontally add/subtract adjacent floating point values
// in `left` and `right`.
"hadd.ps" | "hadd.pd" | "hsub.ps" | "hsub.pd" => {
let [left, right] =
this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;

let which = match unprefixed_name {
"hadd.ps" | "hadd.pd" => mir::BinOp::Add,
"hsub.ps" | "hsub.pd" => mir::BinOp::Sub,
_ => unreachable!(),
};

horizontal_bin_op(this, which, /*saturating*/ false, left, right, dest)?;
}
// Used to implement the _mm_lddqu_si128 function.
// Reads a 128-bit vector from an unaligned pointer. This intrinsic
// is expected to perform better than a regular unaligned read when
// the data crosses a cache line, but for Miri this is just a regular
// unaligned read.
"ldu.dq" => {
let [src_ptr] = this.check_shim(abi, Abi::C { unwind: false }, link_name, args)?;
let src_ptr = this.read_pointer(src_ptr)?;
let dest = dest.force_mplace(this)?;

this.mem_copy(
src_ptr,
Align::ONE,
dest.ptr(),
Align::ONE,
dest.layout.size,
/*nonoverlapping*/ true,
)?;
}
_ => return Ok(EmulateByNameResult::NotSupported),
}
Ok(EmulateByNameResult::NeedsJumping)
}
}
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