LLVM codegen: Don't emit zero-sized padding for fields #87254
Merged
Commits on Aug 4, 2021
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LLVM codegen: Don't emit zero-sized padding for fields
LLVM codegen: Don't emit zero-sized padding for whiles because that has no use and makes it impossible to generate the return types that LLVM expects for certain ARM SIMD intrinsics.
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Don't cache projection if no padding is used.
In this case we can just return memory_index(index) which is readily available.
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Add testcase for proper LLVM representation of SIMD types.
Testcase to make sure that no 0-sized padding is inserted in structs and that structs are represented as expected by Neon intrinsics in LLVM.
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Fix va_args calling on aarch64 non-macos/ios.
emit_aapcs_va_arg() emits hardcoded field indexes to access the aarch64-specific `VaListImpl` struct. Due to the removed padding those indexes have changed.
Commits on Aug 5, 2021
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Store field remapping information together with the LLVM type in a ne…
…w TypeLowering struct instead of an extra cache.
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Replace hard-coded field indexes with lookup on aarch64 non-macos.
The indexes into the VaListImpl struct used on aarch64 ABI (not macos/ios) are hard-coded which is brittle so we replace them with the usual lookup. The varargs ffi is tested in ui/abi/variadic-ffi.rs on aarch64 Linux.
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