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Rollup of 5 pull requests #99210

Merged
merged 36 commits into from
Jul 13, 2022
Merged

Rollup of 5 pull requests #99210

merged 36 commits into from
Jul 13, 2022

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Dylan-DPC
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Successful merges:

Failed merges:

r? @ghost
@rustbot modify labels: rollup

Create a similar rollup

oli-obk and others added 30 commits July 7, 2022 10:46
Inline assembly uses the target features to determine which registers
are available on the current target. However it needs to be able to
access unstable target features for this.

Fixes rust-lang#99071
Co-authored-by: Vadim Petrochenkov <vadim.petrochenkov@gmail.com>
oli-obk and others added 6 commits July 13, 2022 10:11
…li-obk

Lower let-else in MIR

This MR will switch to lower let-else statements in MIR building instead.

To lower let-else in MIR, we build a mini-switch two branches. One branch leads to the matching case, and the other leads to the `else` block. This arrangement will allow temporary lifetime analysis running as-is so that the temporaries are properly extended according to the same rule applied to regular `let` statements.

cc rust-lang#87335

Fix rust-lang#98672
`UnsafeCell` blocks niches inside its nested type from being available outside

fixes rust-lang#87341

This implements the plan by `@eddyb` in rust-lang#87341 (comment)

Somewhat related PR (not strictly necessary, but that cleanup made this PR simpler): rust-lang#94527
… r=petrochenkov

diagnostics: error messages when struct literals fail to parse

If an expression is supplied where a field is expected, the parser can become convinced that it's a shorthand field syntax when it's not.

This PR addresses it by explicitly recording the permitted `:` token immediately after the identifier, and also adds a suggestion to insert the name of the field if it looks like a complex expression.

Fixes rust-lang#98917
…=davidtwco

Keep unstable target features for asm feature checking

Inline assembly uses the target features to determine which registers
are available on the current target. However it needs to be able to
access unstable target features for this.

Fixes rust-lang#99071
…snippet, r=cjgillot

Refactor: remove an unnecessary `span_to_snippet`

`span_suggestion_hidden` does not show the suggested code and the suggestion is used just for rustfix, so `span_to_snippet` is unnecessary here.
@rustbot rustbot added T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. T-libs Relevant to the library team, which will review and decide on the PR/issue. rollup A PR which is a rollup labels Jul 13, 2022
@Dylan-DPC
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@bors r+ rollup=never p=5

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bors commented Jul 13, 2022

📌 Commit 3933b2b has been approved by Dylan-DPC

It is now in the queue for this repository.

@bors bors added the S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. label Jul 13, 2022
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bors commented Jul 13, 2022

⌛ Testing commit 3933b2b with merge c80dde4...

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bors commented Jul 13, 2022

☀️ Test successful - checks-actions
Approved by: Dylan-DPC
Pushing c80dde4 to master...

@bors bors added the merged-by-bors This PR was explicitly merged by bors. label Jul 13, 2022
@bors bors merged commit c80dde4 into rust-lang:master Jul 13, 2022
@rustbot rustbot added this to the 1.64.0 milestone Jul 13, 2022
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Finished benchmarking commit (c80dde4): comparison url.

Instruction count

  • Primary benchmarks: 😿 relevant regressions found
  • Secondary benchmarks: 😿 relevant regressions found
mean1 max count2
Regressions 😿
(primary)
2.6% 4.5% 7
Regressions 😿
(secondary)
1.6% 4.1% 55
Improvements 🎉
(primary)
N/A N/A 0
Improvements 🎉
(secondary)
N/A N/A 0
All 😿🎉 (primary) 2.6% 4.5% 7

Max RSS (memory usage)

Results
  • Primary benchmarks: no relevant changes found
  • Secondary benchmarks: 😿 relevant regressions found
mean1 max count2
Regressions 😿
(primary)
N/A N/A 0
Regressions 😿
(secondary)
3.5% 4.8% 4
Improvements 🎉
(primary)
N/A N/A 0
Improvements 🎉
(secondary)
N/A N/A 0
All 😿🎉 (primary) N/A N/A 0

Cycles

Results
  • Primary benchmarks: 😿 relevant regressions found
  • Secondary benchmarks: 😿 relevant regression found
mean1 max count2
Regressions 😿
(primary)
3.6% 4.4% 2
Regressions 😿
(secondary)
3.5% 3.5% 1
Improvements 🎉
(primary)
N/A N/A 0
Improvements 🎉
(secondary)
N/A N/A 0
All 😿🎉 (primary) 3.6% 4.4% 2

If you disagree with this performance assessment, please file an issue in rust-lang/rustc-perf.

Next Steps: If you can justify the regressions found in this perf run, please indicate this with @rustbot label: +perf-regression-triaged along with sufficient written justification. If you cannot justify the regressions please open an issue or create a new PR that fixes the regressions, add a comment linking to the newly created issue or PR, and then add the perf-regression-triaged label to this PR.

@rustbot label: +perf-regression

Footnotes

  1. the arithmetic mean of the percent change 2 3

  2. number of relevant changes 2 3

@rustbot rustbot added the perf-regression Performance regression. label Jul 13, 2022
flip1995 pushed a commit to flip1995/rust that referenced this pull request Jul 18, 2022
Rollup of 5 pull requests

Successful merges:

 - rust-lang#98574 (Lower let-else in MIR)
 - rust-lang#99011 (`UnsafeCell` blocks niches inside its nested type from being available outside)
 - rust-lang#99030 (diagnostics: error messages when struct literals fail to parse)
 - rust-lang#99155 (Keep unstable target features for asm feature checking)
 - rust-lang#99199 (Refactor: remove an unnecessary `span_to_snippet`)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
@rylev
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rylev commented Jul 19, 2022

@Amanieu it appears that maybe this regression is coming from #99155. Here's the top results from running a cachgrind diff:

1,399,189  ???:SetImpliedBits(llvm::FeatureBitset&, llvm::FeatureBitset const&, llvm::ArrayRef<llvm::SubtargetFeatureKV>)
   34,776  /build/glibc-eX1tMB/glibc-2.31/string/../sysdeps/x86_64/strcmp.S:strcmp
   24,034  ???:llvm::SubtargetFeatureKV const* Find<llvm::SubtargetFeatureKV>(llvm::StringRef, llvm::ArrayRef<llvm::SubtargetFeatureKV>)
   21,150  ???:llvm::X86_MC::initLLVMToSEHAndCVRegMapping(llvm::MCRegisterInfo*)
   20,919  ???:llvm::DenseMap<llvm::MCRegister, int, llvm::DenseMapInfo<llvm::MCRegister, void>, llvm::detail::DenseMapPair<llvm::MCRegister, int> >::grow(unsigned int)
   18,833  /build/glibc-eX1tMB/glibc-2.31/string/../sysdeps/x86_64/multiarch/memcmp-avx2-movbe.S:__memcmp_avx2_movbe
   16,540  /build/glibc-eX1tMB/glibc-2.31/string/../sysdeps/x86_64/multiarch/strlen-avx2.S:__strlen_avx2
   -5,975  ???:<rustc_middle::ty::Ty as rustc_middle::ty::fold::TypeSuperFoldable>::super_fold_with::<rustc_middle::ty::subst::SubstFolder>

Notice that the top result is in LLVM for feature detection which would make sense perhaps if LLVMRustHasFeature is being called more. Thoughts?

@Amanieu
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Amanieu commented Jul 19, 2022

This is quite surprising, I wasn't expecting this code to be hot. It's only called at startup, and even then only twice instead of once. I will see if I can change it to only query the LLVM features once.

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Amanieu commented Jul 19, 2022

It is quite concerning that a whole 5% of the compilation time of "hello world" is just querying LLVM for the list of target features. Perhaps we should consider moving the feature selection logic to rustc in the future.

@rylev
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rylev commented Jul 20, 2022

That is surprising. Should we try to capture this in an issue? This is definitely a perf relevant piece of info that would be good to move out of this PR.

@nnethercote
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I looked at this SetImpliedBits stuff recently. AFAICT, the LLVM API is designed so you can query lots of feature bits at once, via a bitset, and you just get a boolean result indicating if all the feature bits are enabled. But rustc wants to query feature bits one at a time, and x86-64 has lots of features, so SetImpliedBits ends up being called 50+ times. It doesn't sound expensive, but helloworld is so fast to compile that it ends up being a non-trivial fraction of execution time.

I couldn't see how rustc could do better given the LLVM API, but I could easily have overlooked something.

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Here are the notes I wrote down at the time:

Hard to improve. On x86-64 we query ~50 target feature flags, for things like SSE*, AVX*, etc. This is within target_features in compiler/rustc_codegen_llvm/src/llvm_util.rs. We check one flag at a time because the LLVM interface makes it hard to do otherwise, and LLVM is moderately slow to check each one. Even though it’s a significant fraction of execution time for small programs, the absolute time is low, so doesn’t seem worth any further effort.

JohnTitor pushed a commit to JohnTitor/rust that referenced this pull request Jul 26, 2022
Rollup of 5 pull requests

Successful merges:

 - rust-lang#98574 (Lower let-else in MIR)
 - rust-lang#99011 (`UnsafeCell` blocks niches inside its nested type from being available outside)
 - rust-lang#99030 (diagnostics: error messages when struct literals fail to parse)
 - rust-lang#99155 (Keep unstable target features for asm feature checking)
 - rust-lang#99199 (Refactor: remove an unnecessary `span_to_snippet`)

Failed merges:

r? `@ghost`
`@rustbot` modify labels: rollup
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