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fmt and clippy
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gnzlbg committed Jan 4, 2018
1 parent b36c7e8 commit 275071e
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Showing 7 changed files with 60 additions and 45 deletions.
4 changes: 4 additions & 0 deletions coresimd/src/x86/i586/bswap.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,7 @@
//! Byte swap intrinsics.
#![cfg_attr(feature = "cargo-clippy", allow(stutter))]

#[cfg(test)]
use stdsimd_test::assert_instr;

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4 changes: 2 additions & 2 deletions coresimd/src/x86/i686/sse4a.rs
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
//! `i686`'s Streaming SIMD Extensions 4a (SSE4a)
//! `i686`'s Streaming SIMD Extensions 4a (`SSE4a`)
use core::mem;
use v128::*;
Expand Down Expand Up @@ -52,7 +52,7 @@ pub unsafe fn _mm_extract_si64(x: i64x2, y: i64x2) -> i64x2 {
#[target_feature = "+sse4a"]
#[cfg_attr(test, assert_instr(insertq))]
pub unsafe fn _mm_insert_si64(x: i64x2, y: i64x2) -> i64x2 {
insertq(x, mem::transmute(y))
insertq(x, y)
}

/// Non-temporal store of `a.0` into `p`.
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6 changes: 5 additions & 1 deletion coresimd/src/x86/i686/ssse3.rs
Original file line number Diff line number Diff line change
Expand Up @@ -256,7 +256,11 @@ mod tests {
unsafe fn _mm_alignr_pi8() {
let a = u32x2::new(0x89ABCDEF_u32, 0x01234567_u32);
let b = u32x2::new(0xBBAA9988_u32, 0xFFDDEECC_u32);
let r = ssse3::_mm_alignr_pi8(u8x8::from(a).into(), u8x8::from(b).into(), 4);
let r = ssse3::_mm_alignr_pi8(
u8x8::from(a).into(),
u8x8::from(b).into(),
4,
);
assert_eq!(r, ::std::mem::transmute(0x89abcdefffddeecc_u64));
}

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10 changes: 5 additions & 5 deletions coresimd/src/x86/macros.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
macro_rules! constify_imm8 {
($imm8:expr, $expand:ident) => {
#[allow(overflowing_literals)]
match $imm8 & 0b1111_1111 {
match ($imm8) & 0b1111_1111 {
0 => $expand!(0),
1 => $expand!(1),
2 => $expand!(2),
Expand Down Expand Up @@ -267,7 +267,7 @@ macro_rules! constify_imm8 {
macro_rules! constify_imm6 {
($imm8:expr, $expand:ident) => {
#[allow(overflowing_literals)]
match $imm8 & 0b1_1111 {
match ($imm8) & 0b1_1111 {
0 => $expand!(0),
1 => $expand!(1),
2 => $expand!(2),
Expand Down Expand Up @@ -307,7 +307,7 @@ macro_rules! constify_imm6 {
macro_rules! constify_imm4 {
($imm8:expr, $expand:ident) => {
#[allow(overflowing_literals)]
match $imm8 & 0b1111 {
match ($imm8) & 0b1111 {
0 => $expand!(0),
1 => $expand!(1),
2 => $expand!(2),
Expand All @@ -331,7 +331,7 @@ macro_rules! constify_imm4 {
macro_rules! constify_imm3 {
($imm8:expr, $expand:ident) => {
#[allow(overflowing_literals)]
match $imm8 & 0b111 {
match ($imm8) & 0b111 {
0 => $expand!(0),
1 => $expand!(1),
2 => $expand!(2),
Expand All @@ -347,7 +347,7 @@ macro_rules! constify_imm3 {
macro_rules! constify_imm2 {
($imm8:expr, $expand:ident) => {
#[allow(overflowing_literals)]
match $imm8 & 0b11 {
match ($imm8) & 0b11 {
0 => $expand!(0),
1 => $expand!(1),
2 => $expand!(2),
Expand Down
2 changes: 2 additions & 0 deletions coresimd/src/x86/x86_64/sse41.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,5 @@
//! `i686`'s Streaming SIMD Extensions 4.1 (SSE4.1)
use v128::*;

#[cfg(test)]
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38 changes: 22 additions & 16 deletions stdsimd-test/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -304,34 +304,35 @@ pub fn assert(fnptr: usize, fnname: &str, expected: &str) {
None => continue,
};
if !part.contains("call") {
continue
continue;
}

// On 32-bit x86 position independent code will call itself and be
// immediately followed by a `pop` to learn about the current address.
// Let's not take that into account when considering whether a function
// failed inlining something.
let followed_by_pop = function.instrs.get(i + 1)
let followed_by_pop = function
.instrs
.get(i + 1)
.and_then(|i| i.parts.get(0))
.map(|s| s.contains("pop"))
.unwrap_or(false);
.map_or(false, |s| s.contains("pop"));
if followed_by_pop && cfg!(target_arch = "x86") {
continue
continue;
}

inlining_failed = true;
break;
}

let instruction_limit = match expected {
// cpuid returns a pretty big aggregate structure so excempt it from the
// slightly more restrictive 20 instructions below
// cpuid returns a pretty big aggregate structure so excempt it from
// the slightly more restrictive 20 instructions below
"cpuid" => 30,

// Apparently on Windows LLVM generates a bunch of saves/restores of xmm
// registers around these intstructions which blows the 20 limit
// below. As it seems dictates by Windows's abi (I guess?) we probably
// can't do much about it...
// Apparently on Windows LLVM generates a bunch of saves/restores of
// xmm registers around these intstructions which blows the 20
// limit below. As it seems dictates by Windows's abi (I
// guess?) we probably can't do much about it...
"vzeroall" | "vzeroupper" if cfg!(windows) => 30,

_ => 20,
Expand Down Expand Up @@ -363,12 +364,17 @@ pub fn assert(fnptr: usize, fnname: &str, expected: &str) {
expected
);
} else if !probably_only_one_instruction {
panic!("instruction found, but the disassembly contains too many \
instructions: #instructions = {} >= {} (limit)",
function.instrs.len(), instruction_limit);
panic!(
"instruction found, but the disassembly contains too many \
instructions: #instructions = {} >= {} (limit)",
function.instrs.len(),
instruction_limit
);
} else if inlining_failed {
panic!("instruction found, but the disassembly contains `call` \
instructions, which hint that inlining failed");
panic!(
"instruction found, but the disassembly contains `call` \
instructions, which hint that inlining failed"
);
}
}

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41 changes: 20 additions & 21 deletions stdsimd-verify/tests/x86-intel.rs
Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
#![feature(proc_macro)]
#![allow(bad_style)]
#![cfg_attr(feature = "cargo-clippy",
allow(shadow_reuse, cast_lossless, match_same_arms))]

#[macro_use]
extern crate serde_derive;
Expand Down Expand Up @@ -111,7 +113,7 @@ fn verify_all_signatures() {
let data: Data =
serde_xml_rs::deserialize(xml).expect("failed to deserialize xml");
let mut map = HashMap::new();
for intrinsic in data.intrinsics.iter() {
for intrinsic in &data.intrinsics {
// This intrinsic has multiple definitions in the XML, so just ignore
// it.
if intrinsic.name == "_mm_prefetch" {
Expand Down Expand Up @@ -148,8 +150,8 @@ fn verify_all_signatures() {
// Verify that all `#[target_feature]` annotations are correct,
// ensuring that we've actually enabled the right instruction
// set for this intrinsic.
assert!(intel.cpuid.len() > 0, "missing cpuid for {}", rust.name);
for cpuid in intel.cpuid.iter() {
assert!(!intel.cpuid.is_empty(), "missing cpuid for {}", rust.name);
for cpuid in &intel.cpuid {
// this is needed by _xsave and probably some related intrinsics,
// but let's just skip it for now.
if *cpuid == "XSS" {
Expand Down Expand Up @@ -181,7 +183,7 @@ fn verify_all_signatures() {
// TODO: we should test this, but it generates too many failures right
// now
if false {
if rust.instrs.len() == 0 {
if rust.instrs.is_empty() {
assert_eq!(
intel.instruction.len(),
0,
Expand All @@ -192,8 +194,8 @@ fn verify_all_signatures() {
// If intel doesn't list any instructions and we do then don't
// bother trying to look for instructions in intel, we've just got
// some extra assertions on our end.
} else if intel.instruction.len() > 0 {
for instr in rust.instrs.iter() {
} else if !intel.instruction.is_empty() {
for instr in rust.instrs {
assert!(
intel
.instruction
Expand All @@ -208,25 +210,22 @@ fn verify_all_signatures() {
}

// Make sure we've got the right return type.
match rust.ret {
Some(t) => equate(t, &intel.rettype, &rust.name),
None => {
assert!(
intel.rettype == "" || intel.rettype == "void",
"{} returns `{}` with intel, void in rust",
rust.name,
intel.rettype
);
}
if let Some(t) = rust.ret {
equate(t, &intel.rettype, rust.name);
} else {
assert!(
intel.rettype == "" || intel.rettype == "void",
"{} returns `{}` with intel, void in rust",
rust.name,
intel.rettype
);
}

// If there's no arguments on Rust's side intel may list one "void"
// argument, so handle that here.
if rust.arguments.len() == 0 {
if intel.parameters.len() == 1 {
assert_eq!(intel.parameters[0].type_, "void");
continue;
}
if rust.arguments.is_empty() && intel.parameters.len() == 1 {
assert_eq!(intel.parameters[0].type_, "void");
continue;
}

// Otherwise we want all parameters to be exactly the same
Expand Down

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