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Rename misleading features #1355

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Nov 21, 2022
Merged

Rename misleading features #1355

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8f3ebb8
Rename misleading features to match rustc
calebzulawski Nov 16, 2022
c283960
Change feature detection names
calebzulawski Nov 16, 2022
35fff56
Add deprecation message
calebzulawski Nov 18, 2022
c1e3be5
Fix testing of deprecated features
calebzulawski Nov 18, 2022
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108 changes: 54 additions & 54 deletions crates/core_arch/src/x86/avx512gfni.rs → crates/core_arch/src/x86/gfni.rs
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12 changes: 6 additions & 6 deletions crates/core_arch/src/x86/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -835,17 +835,17 @@ pub use self::avx512vnni::*;
mod avx512bitalg;
pub use self::avx512bitalg::*;

mod avx512gfni;
pub use self::avx512gfni::*;
mod gfni;
pub use self::gfni::*;

mod avx512vpopcntdq;
pub use self::avx512vpopcntdq::*;

mod avx512vaes;
pub use self::avx512vaes::*;
mod vaes;
pub use self::vaes::*;

mod avx512vpclmulqdq;
pub use self::avx512vpclmulqdq::*;
mod vpclmulqdq;
pub use self::vpclmulqdq::*;

mod bt;
pub use self::bt::*;
Expand Down
52 changes: 26 additions & 26 deletions crates/core_arch/src/x86/avx512vaes.rs → crates/core_arch/src/x86/vaes.rs
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Expand Up @@ -38,7 +38,7 @@ extern "C" {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesenc_epi128)
#[inline]
#[target_feature(enable = "avx512vaes")]
#[target_feature(enable = "vaes")]
#[cfg_attr(test, assert_instr(vaesenc))]
pub unsafe fn _mm256_aesenc_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesenc_256(a, round_key)
Expand All @@ -49,7 +49,7 @@ pub unsafe fn _mm256_aesenc_epi128(a: __m256i, round_key: __m256i) -> __m256i {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesenclast_epi128)
#[inline]
#[target_feature(enable = "avx512vaes")]
#[target_feature(enable = "vaes")]
#[cfg_attr(test, assert_instr(vaesenclast))]
pub unsafe fn _mm256_aesenclast_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesenclast_256(a, round_key)
Expand All @@ -60,7 +60,7 @@ pub unsafe fn _mm256_aesenclast_epi128(a: __m256i, round_key: __m256i) -> __m256
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesdec_epi128)
#[inline]
#[target_feature(enable = "avx512vaes")]
#[target_feature(enable = "vaes")]
#[cfg_attr(test, assert_instr(vaesdec))]
pub unsafe fn _mm256_aesdec_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesdec_256(a, round_key)
Expand All @@ -71,7 +71,7 @@ pub unsafe fn _mm256_aesdec_epi128(a: __m256i, round_key: __m256i) -> __m256i {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_aesdeclast_epi128)
#[inline]
#[target_feature(enable = "avx512vaes")]
#[target_feature(enable = "vaes")]
#[cfg_attr(test, assert_instr(vaesdeclast))]
pub unsafe fn _mm256_aesdeclast_epi128(a: __m256i, round_key: __m256i) -> __m256i {
aesdeclast_256(a, round_key)
Expand All @@ -82,7 +82,7 @@ pub unsafe fn _mm256_aesdeclast_epi128(a: __m256i, round_key: __m256i) -> __m256
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_aesenc_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512f")]
#[target_feature(enable = "vaes,avx512f")]
#[cfg_attr(test, assert_instr(vaesenc))]
pub unsafe fn _mm512_aesenc_epi128(a: __m512i, round_key: __m512i) -> __m512i {
aesenc_512(a, round_key)
Expand All @@ -93,7 +93,7 @@ pub unsafe fn _mm512_aesenc_epi128(a: __m512i, round_key: __m512i) -> __m512i {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_aesenclast_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512f")]
#[target_feature(enable = "vaes,avx512f")]
#[cfg_attr(test, assert_instr(vaesenclast))]
pub unsafe fn _mm512_aesenclast_epi128(a: __m512i, round_key: __m512i) -> __m512i {
aesenclast_512(a, round_key)
Expand All @@ -104,7 +104,7 @@ pub unsafe fn _mm512_aesenclast_epi128(a: __m512i, round_key: __m512i) -> __m512
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_aesdec_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512f")]
#[target_feature(enable = "vaes,avx512f")]
#[cfg_attr(test, assert_instr(vaesdec))]
pub unsafe fn _mm512_aesdec_epi128(a: __m512i, round_key: __m512i) -> __m512i {
aesdec_512(a, round_key)
Expand All @@ -115,7 +115,7 @@ pub unsafe fn _mm512_aesdec_epi128(a: __m512i, round_key: __m512i) -> __m512i {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_aesdeclast_epi128)
#[inline]
#[target_feature(enable = "avx512vaes,avx512f")]
#[target_feature(enable = "vaes,avx512f")]
#[cfg_attr(test, assert_instr(vaesdeclast))]
pub unsafe fn _mm512_aesdeclast_epi128(a: __m512i, round_key: __m512i) -> __m512i {
aesdeclast_512(a, round_key)
Expand All @@ -138,7 +138,7 @@ mod tests {
// ideally we'd be using quickcheck here instead

#[target_feature(enable = "avx2")]
unsafe fn helper_for_256_avx512vaes(
unsafe fn helper_for_256_vaes(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m256i, __m256i) -> __m256i,
) {
Expand Down Expand Up @@ -187,7 +187,7 @@ mod tests {
setup_state_key(_mm512_broadcast_i32x4)
}

#[simd_test(enable = "avx512vaes,avx512vl")]
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesdec_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let (a, k) = setup_state_key_256();
Expand All @@ -196,10 +196,10 @@ mod tests {
let r = _mm256_aesdec_epi128(a, k);
assert_eq_m256i(r, e);

helper_for_256_avx512vaes(_mm_aesdec_si128, _mm256_aesdec_epi128);
helper_for_256_vaes(_mm_aesdec_si128, _mm256_aesdec_epi128);
}

#[simd_test(enable = "avx512vaes,avx512vl")]
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesdeclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714178.aspx.
let (a, k) = setup_state_key_256();
Expand All @@ -208,10 +208,10 @@ mod tests {
let r = _mm256_aesdeclast_epi128(a, k);
assert_eq_m256i(r, e);

helper_for_256_avx512vaes(_mm_aesdeclast_si128, _mm256_aesdeclast_epi128);
helper_for_256_vaes(_mm_aesdeclast_si128, _mm256_aesdeclast_epi128);
}

#[simd_test(enable = "avx512vaes,avx512vl")]
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesenc_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664810.aspx.
// they are repeated appropriately
Expand All @@ -221,10 +221,10 @@ mod tests {
let r = _mm256_aesenc_epi128(a, k);
assert_eq_m256i(r, e);

helper_for_256_avx512vaes(_mm_aesenc_si128, _mm256_aesenc_epi128);
helper_for_256_vaes(_mm_aesenc_si128, _mm256_aesenc_epi128);
}

#[simd_test(enable = "avx512vaes,avx512vl")]
#[simd_test(enable = "vaes,avx512vl")]
unsafe fn test_mm256_aesenclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714136.aspx.
let (a, k) = setup_state_key_256();
Expand All @@ -233,11 +233,11 @@ mod tests {
let r = _mm256_aesenclast_epi128(a, k);
assert_eq_m256i(r, e);

helper_for_256_avx512vaes(_mm_aesenclast_si128, _mm256_aesenclast_epi128);
helper_for_256_vaes(_mm_aesenclast_si128, _mm256_aesenclast_epi128);
}

#[target_feature(enable = "avx512f")]
unsafe fn helper_for_512_avx512vaes(
unsafe fn helper_for_512_vaes(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m512i, __m512i) -> __m512i,
) {
Expand Down Expand Up @@ -282,7 +282,7 @@ mod tests {
assert_eq_m128i(_mm512_extracti32x4_epi32::<3>(r), e_decomp[3]);
}

#[simd_test(enable = "avx512vaes,avx512f")]
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesdec_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664949.aspx.
let (a, k) = setup_state_key_512();
Expand All @@ -291,10 +291,10 @@ mod tests {
let r = _mm512_aesdec_epi128(a, k);
assert_eq_m512i(r, e);

helper_for_512_avx512vaes(_mm_aesdec_si128, _mm512_aesdec_epi128);
helper_for_512_vaes(_mm_aesdec_si128, _mm512_aesdec_epi128);
}

#[simd_test(enable = "avx512vaes,avx512f")]
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesdeclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714178.aspx.
let (a, k) = setup_state_key_512();
Expand All @@ -303,10 +303,10 @@ mod tests {
let r = _mm512_aesdeclast_epi128(a, k);
assert_eq_m512i(r, e);

helper_for_512_avx512vaes(_mm_aesdeclast_si128, _mm512_aesdeclast_epi128);
helper_for_512_vaes(_mm_aesdeclast_si128, _mm512_aesdeclast_epi128);
}

#[simd_test(enable = "avx512vaes,avx512f")]
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesenc_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc664810.aspx.
let (a, k) = setup_state_key_512();
Expand All @@ -315,10 +315,10 @@ mod tests {
let r = _mm512_aesenc_epi128(a, k);
assert_eq_m512i(r, e);

helper_for_512_avx512vaes(_mm_aesenc_si128, _mm512_aesenc_epi128);
helper_for_512_vaes(_mm_aesenc_si128, _mm512_aesenc_epi128);
}

#[simd_test(enable = "avx512vaes,avx512f")]
#[simd_test(enable = "vaes,avx512f")]
unsafe fn test_mm512_aesenclast_epi128() {
// Constants taken from https://msdn.microsoft.com/en-us/library/cc714136.aspx.
let (a, k) = setup_state_key_512();
Expand All @@ -327,6 +327,6 @@ mod tests {
let r = _mm512_aesenclast_epi128(a, k);
assert_eq_m512i(r, e);

helper_for_512_avx512vaes(_mm_aesenclast_si128, _mm512_aesenclast_epi128);
helper_for_512_vaes(_mm_aesenclast_si128, _mm512_aesenclast_epi128);
}
}
12 changes: 6 additions & 6 deletions crates/core_arch/src/x86/avx512vpclmulqdq.rs → crates/core_arch/src/x86/vpclmulqdq.rs
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Expand Up @@ -32,7 +32,7 @@ extern "C" {
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_clmulepi64_epi128)
#[inline]
#[target_feature(enable = "avx512vpclmulqdq,avx512f")]
#[target_feature(enable = "vpclmulqdq,avx512f")]
// technically according to Intel's documentation we don't need avx512f here, however LLVM gets confused otherwise
#[cfg_attr(test, assert_instr(vpclmul, IMM8 = 0))]
#[rustc_legacy_const_generics(2)]
Expand All @@ -50,7 +50,7 @@ pub unsafe fn _mm512_clmulepi64_epi128<const IMM8: i32>(a: __m512i, b: __m512i)
///
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_clmulepi64_epi128)
#[inline]
#[target_feature(enable = "avx512vpclmulqdq")]
#[target_feature(enable = "vpclmulqdq")]
#[cfg_attr(test, assert_instr(vpclmul, IMM8 = 0))]
#[rustc_legacy_const_generics(2)]
pub unsafe fn _mm256_clmulepi64_epi128<const IMM8: i32>(a: __m256i, b: __m256i) -> __m256i {
Expand Down Expand Up @@ -121,7 +121,7 @@ mod tests {

// this function tests one of the possible 4 instances
// with different inputs across lanes
#[target_feature(enable = "avx512vpclmulqdq,avx512f")]
#[target_feature(enable = "vpclmulqdq,avx512f")]
unsafe fn verify_512_helper(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m512i, __m512i) -> __m512i,
Expand Down Expand Up @@ -162,7 +162,7 @@ mod tests {

// this function tests one of the possible 4 instances
// with different inputs across lanes for the VL version
#[target_feature(enable = "avx512vpclmulqdq,avx512vl")]
#[target_feature(enable = "vpclmulqdq,avx512vl")]
unsafe fn verify_256_helper(
linear: unsafe fn(__m128i, __m128i) -> __m128i,
vectorized: unsafe fn(__m256i, __m256i) -> __m256i,
Expand Down Expand Up @@ -204,7 +204,7 @@ mod tests {
unroll! {assert_eq_m128i(_mm256_extracti128_si256::<2>(r),e_decomp[2]);}
}

#[simd_test(enable = "avx512vpclmulqdq,avx512f")]
#[simd_test(enable = "vpclmulqdq,avx512f")]
unsafe fn test_mm512_clmulepi64_epi128() {
verify_kat_pclmul!(
_mm512_broadcast_i32x4,
Expand All @@ -230,7 +230,7 @@ mod tests {
);
}

#[simd_test(enable = "avx512vpclmulqdq,avx512vl")]
#[simd_test(enable = "vpclmulqdq,avx512vl")]
unsafe fn test_mm256_clmulepi64_epi128() {
verify_kat_pclmul!(
_mm256_broadcastsi128_si256,
Expand Down
21 changes: 15 additions & 6 deletions crates/core_arch/tests/cpu-detection.rs
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Expand Up @@ -31,12 +31,9 @@ fn x86_all() {
is_x86_feature_detected!("avx512vpopcntdq")
);
println!("avx512vbmi2 {:?}", is_x86_feature_detected!("avx512vbmi2"));
println!("avx512gfni {:?}", is_x86_feature_detected!("avx512gfni"));
println!("avx512vaes {:?}", is_x86_feature_detected!("avx512vaes"));
println!(
"avx512vpclmulqdq {:?}",
is_x86_feature_detected!("avx512vpclmulqdq")
);
println!("gfni {:?}", is_x86_feature_detected!("gfni"));
println!("vaes {:?}", is_x86_feature_detected!("vaes"));
println!("vpclmulqdq {:?}", is_x86_feature_detected!("vpclmulqdq"));
println!("avx512vnni {:?}", is_x86_feature_detected!("avx512vnni"));
println!(
"avx512bitalg {:?}",
Expand All @@ -61,3 +58,15 @@ fn x86_all() {
println!("xsaves: {:?}", is_x86_feature_detected!("xsaves"));
println!("xsavec: {:?}", is_x86_feature_detected!("xsavec"));
}

#[test]
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
#[allow(deprecated)]
fn x86_deprecated() {
println!("avx512gfni {:?}", is_x86_feature_detected!("avx512gfni"));
println!("avx512vaes {:?}", is_x86_feature_detected!("avx512vaes"));
println!(
"avx512vpclmulqdq {:?}",
is_x86_feature_detected!("avx512vpclmulqdq")
);
}
15 changes: 9 additions & 6 deletions crates/std_detect/src/detect/arch/x86.rs
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Expand Up @@ -68,9 +68,9 @@ features! {
/// * `"avx512vbmi"`
/// * `"avx512vpopcntdq"`
/// * `"avx512vbmi2"`
/// * `"avx512gfni"`
/// * `"avx512vaes"`
/// * `"avx512vpclmulqdq"`
/// * `"gfni"`
/// * `"vaes"`
/// * `"vpclmulqdq"`
/// * `"avx512vnni"`
/// * `"avx512bitalg"`
/// * `"avx512bf16"`
Expand All @@ -95,6 +95,9 @@ features! {
/// [docs]: https://software.intel.com/sites/landingpage/IntrinsicsGuide
#[stable(feature = "simd_x86", since = "1.27.0")]
@BIND_FEATURE_NAME: "abm"; "lzcnt"; // abm is a synonym for lzcnt
@BIND_FEATURE_NAME: "avx512gfni"; "gfni"; #[deprecated(since = "1.67.0", note = "the `avx512gfni` feature has been renamed to `gfni`")];
@BIND_FEATURE_NAME: "avx512vaes"; "vaes"; #[deprecated(since = "1.67.0", note = "the `avx512vaes` feature has been renamed to `vaes`")];
@BIND_FEATURE_NAME: "avx512vpclmulqdq"; "vpclmulqdq"; #[deprecated(since = "1.67.0", note = "the `avx512vpclmulqdq` feature has been renamed to `vpclmulqdq`")];
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] aes: "aes";
/// AES (Advanced Encryption Standard New Instructions AES-NI)
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] pclmulqdq: "pclmulqdq";
Expand Down Expand Up @@ -150,11 +153,11 @@ features! {
/// Quadword)
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vbmi2: "avx512vbmi2";
/// AVX-512 VBMI2 (Additional byte, word, dword and qword capabilities)
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512gfni: "avx512gfni";
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] gfni: "gfni";
/// AVX-512 GFNI (Galois Field New Instruction)
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vaes: "avx512vaes";
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] vaes: "vaes";
/// AVX-512 VAES (Vector AES instruction)
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vpclmulqdq: "avx512vpclmulqdq";
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] vpclmulqdq: "vpclmulqdq";
/// AVX-512 VPCLMULQDQ (Vector PCLMULQDQ instructions)
@FEATURE: #[stable(feature = "simd_x86", since = "1.27.0")] avx512vnni: "avx512vnni";
/// AVX-512 VNNI (Vector Neural Network Instructions)
Expand Down
12 changes: 10 additions & 2 deletions crates/std_detect/src/detect/macros.rs
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Expand Up @@ -17,7 +17,7 @@ macro_rules! features {
@CFG: $cfg:meta;
@MACRO_NAME: $macro_name:ident;
@MACRO_ATTRS: $(#[$macro_attrs:meta])*
$(@BIND_FEATURE_NAME: $bind_feature:tt; $feature_impl:tt; )*
$(@BIND_FEATURE_NAME: $bind_feature:tt; $feature_impl:tt; $(#[$deprecate_attr:meta];)?)*
$(@NO_RUNTIME_DETECTION: $nort_feature:tt; )*
$(@FEATURE: #[$stability_attr:meta] $feature:ident: $feature_lit:tt;
$(implied by target_features: [$($target_feature_lit:tt),*];)?
Expand All @@ -35,7 +35,15 @@ macro_rules! features {
};
)*
$(
($bind_feature) => { $crate::$macro_name!($feature_impl) };
($bind_feature) => {
{
$(
#[$deprecate_attr] macro_rules! deprecated_feature { {} => {}; }
deprecated_feature! {};
)?
$crate::$macro_name!($feature_impl)
}
};
)*
$(
($nort_feature) => {
Expand Down
6 changes: 3 additions & 3 deletions crates/std_detect/src/detect/os/x86.rs
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Expand Up @@ -211,10 +211,10 @@ pub(crate) fn detect_features() -> cache::Initializer {
enable(extended_features_ecx, 1, Feature::avx512vbmi);
enable(extended_features_ecx, 5, Feature::avx512bf16);
enable(extended_features_ecx, 6, Feature::avx512vbmi2);
enable(extended_features_ecx, 8, Feature::avx512gfni);
enable(extended_features_ecx, 8, Feature::gfni);
enable(extended_features_ecx, 8, Feature::avx512vp2intersect);
enable(extended_features_ecx, 9, Feature::avx512vaes);
enable(extended_features_ecx, 10, Feature::avx512vpclmulqdq);
enable(extended_features_ecx, 9, Feature::vaes);
enable(extended_features_ecx, 10, Feature::vpclmulqdq);
enable(extended_features_ecx, 11, Feature::avx512vnni);
enable(extended_features_ecx, 12, Feature::avx512bitalg);
enable(extended_features_ecx, 14, Feature::avx512vpopcntdq);
Expand Down
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