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riscv: telink: adjust analog register and deferred storage for tl3218 #2043

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riscv: telink: adjust analog register and deferred storage for tl3218

riscv: telink: adjust analog register and deferred storage for tl3218 #2043

Triggered via pull request January 15, 2025 10:34
@fengtai-telinkfengtai-telink
synchronize #371
develop_dual_adjust_feature
Status Success
Total duration 51m 19s
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examples-mw320.yaml

on: pull_request
MW320
11m 29s
MW320
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2 warnings
MW320
No files were found with the provided path: /tmp/bloat_reports/. No artifacts will be uploaded.
MW320
`pre` execution is not supported for local action from './.github/actions/checkout-submodules-and-bootstrap'