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riscv: telink: separate ram for tl3218x . #393

riscv: telink: separate ram for tl3218x .

riscv: telink: separate ram for tl3218x . #393

Triggered via pull request January 20, 2025 02:17
Status Success
Total duration 55m 27s
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2 warnings
Linux Test
No files were found with the provided path: /tmp/bloat_reports/. No artifacts will be uploaded.
Linux Test
`pre` execution is not supported for local action from './.github/actions/checkout-submodules-and-bootstrap'