| [19:17] | [16:13] | [12:9] | [8:5] | [4:3] | [2:0] |
|---|---|---|---|---|---|
| op (3-bit) | rs (4-bit) | rt (4-bit) | rd (4-bit) | shamt (2-bit) | funct (3-bit) |
| [19:17] | [16:13] | [12:9] | [8:0] |
|---|---|---|---|
| op (3-bit) | rs (4-bit) | rd (4-bit) | immediate (9-bit) |
| [19:17] | [16:0] |
|---|---|
| op (3-bit) | target address (17-bit) |
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Design of a custom CPU based on the Machine Code Bits. This CPU executes instructions sequentially from memory and features a fully functional datapath and control unit.
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saifmohammednipun/20-bit-Single-Cycle-MIPS-Processor
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Design of a custom CPU based on the Machine Code Bits. This CPU executes instructions sequentially from memory and features a fully functional datapath and control unit.
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