Pinned Loading
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Simple-Acc
Simple-Acc PublicA simple accumulator based on a RISC written in Verilog and System Verilog.
Verilog 1
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CesiumDemo
CesiumDemo PublicDemo for using Cesium as the frontend for graphing GIS data.
JavaScript
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xnor_cnn_accelerator
xnor_cnn_accelerator PublicA hardware accelerator for a single state of an all-binary convolutional neural net described in Verilog 2001 and synthesized with Synopsys DC
Tcl 1
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