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thermostat v2.0 #4

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hartytp opened this issue Nov 7, 2018 · 70 comments
Closed

thermostat v2.0 #4

hartytp opened this issue Nov 7, 2018 · 70 comments

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@hartytp
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hartytp commented Nov 7, 2018

We've had some problems recently with a common commercially available temperature controller, which we've tracked down to inadequate EMI filtering in the temperature controller AFE and use of unscreened cabling in the wiring harness provided by a different vendor (the 10k NTC has a 100uA sense current so is a high-impedance node which is very prone to pickup even at 50Hz).

To solve this, I'd like to swap out these temperature control units for Thermostat, but there are two annoyances:

  1. The specified temp co of the Thorlabs chip is quite high and likely to be problematic if we don't temperature stabilise Thermostat, which is a pain
  2. We use a resistive heater rather than a TEC for this project. AFAICT there is no software option to make the Thorlabs chips run unipolar (AFAICT the designers didn't consider resistive heaters as an option so didn't bother to implement this in firmware). So, if any transient reduces the heater current below 0 then it will go into thermal run away.

So, I'd like to revive the discussion about replacing the Thorlabs chip with something along the lines of @cjbe's design based on a 24-bit ADC and the Maxim TEC driver IC. As a reminder, the big win from using a 24-bit sigma-delta ADC is that the sample rate is high and the ADC includes very good digital filtering (including extreme rejection of 50/60Hz signals). Combined with a basic CM/DM analog RFI filter, this provides a level of EMI rejection that is essentially impossible to achieve in the analog designs that seem to be used in almost all COTS units. Using @cjbe's prototypes of this design, we were able to achieve stabilities better than 100uK long term without issue.

As I see it, the main challenge here is software. The hardware redesign is very easy and I'd be happy to do that myself using @gkasprow's Altium library. The more involved part is writing decent software: command handler; simple PI(D?) loop; some basic features like thermal runaway detection, current limiting, anti-wind up, etc. I don't have time to do that part. @gkasprow do you have a student who might be interested in doing that? (otherwise, if anyone is potentially interested in funding M-Labs to do this then let us know!)

@gkasprow
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gkasprow commented Nov 7, 2018

@hartytp I can add AD7191 to existing design. @cjbe how did you couple the PIC processor with MAX1968 CTLI input? Using PWM?

@gkasprow
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gkasprow commented Nov 7, 2018

We can ask the student to port the PIC code to the TI CPU.

@hartytp
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hartytp commented Nov 7, 2018

We can ask the student to port the PIC code to the TI CPU.

Which PIC code do you mean?

@gkasprow
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gkasprow commented Nov 7, 2018

#5 (comment)

@cjbe
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cjbe commented Nov 7, 2018

@gkasprow yes - I generate the CTLI signal from a PWM output and a two-pole reconstruction filter (10k,100n).

@gkasprow
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gkasprow commented Nov 7, 2018

@hartytp I'm preparing second version of the PCB, without Wiznet module and Thorlabs modules. We will produce both versions at the time. Fitting both configurations in single design would cost too much work.

@hartytp
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hartytp commented Nov 7, 2018

@gkasprow perfect! I agree: these should be two separate designs rather than trying to fit everything on one board. The Thorlabs version gives us something we can use with minimal effort/risk of hardware bugs, the ADC version should work better in the long run but will need software development and careful hardware characterisation.

@gkasprow
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gkasprow commented Nov 7, 2018

@hartytp please have a look
Thermostat.PDF

@hartytp
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hartytp commented Nov 8, 2018

@gkasprow wow! Thanks for turning that around so fast!

@cjbe any thoughts? Things you'd want to change if you did this design again?

Basically that looks good to go as far as I'm concerned. Small thoughts/comments:

  • Cosmetics could be improved but that's non-crucial e.g. would be nice to neaten things up a little, add a power budget, etc. (e.g. I find the fact that the signal flow is R->L on the 3v3->vcc->vref block on the adc makes things a bit hard to follow)
  • @cjbe's design is a bit long in the tooth now and there are newer better ADCs around. However, based on his design notes, it seems that the ADC isn't really a limitation here. The only way I can see where the ADC comes close to being a limitation is the +-1ppm/K gain drift. The best ADCs on the market are still only a factor of two better than that, so the overall improvement is relatively small. Probably not worth the hassle of switching ADCs.
  • what are the inductors on the TEC driver? Let's use ones that retain their inductance at 1.5A and pick ones that won't radiate like crazy!

@gkasprow
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gkasprow commented Nov 8, 2018

I used tiny SMD shielded inductors that saturate at 3A.

@jordens
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jordens commented Nov 8, 2018

As a humorous side remark: I've heard talks by high profile representatives of well known companies in all seriousness claiming that inductors are what's limiting miniaturization, integration, scaling, and technological progress in laser current and TEC drivers.

@hartytp
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hartytp commented Nov 8, 2018

@gkasprow what capacitors (voltage rating, case size, dielectric) are you using for IC1? That reg needs 1uF for stability, so we need to make sure we don't use a cheapo ceramic which gives far less capacitance when biassed.

@gkasprow
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gkasprow commented Nov 8, 2018

You won't find 1uF NPO. I used X7R.

@hartytp
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hartytp commented Nov 8, 2018

Yes, X7R is good for this, but we need to watch the case size and voltage rating or the capacitance can be way lower than expected. Since this is required for stability, I'd probably make it a slightly higher capacitance and use a decent voltage rating and case size.

@hartytp
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hartytp commented Nov 8, 2018

Can you add an annotation that the 5k11 resistors must be 5ppm/K temp co?

(if you upload the altium files I'm happy to do this).

@hartytp
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hartytp commented Nov 8, 2018

@cjbe's design is a bit long in the tooth now and there are newer better ADCs around. However, based on his design notes, it seems that the ADC isn't really a limitation here. The only way I can see where the ADC comes close to being a limitation is the +-1ppm/K gain drift. The best ADCs on the market are still only a factor of two better than that, so the overall improvement is relatively small. Probably not worth the hassle of switching ADCs.

If we swapped the AD7191 for something like AD7172-2 then the typical gain temp co is a factor of 5 lower (0.2ppm/K typical). That eliminates the ADC from the error budget. Still, however, that only makes a factor of <2 change in the overall temp co since the 5ppm reference resistors give a 0.1mK/K temp co.

@hartytp
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hartytp commented Nov 8, 2018

@gkasprow let's tie the ADC CLKSEL high to ensure the internal clock is correctly enabled.

@hartytp
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hartytp commented Nov 8, 2018

let's connect the ADC TEMP pin to the microprocessor to allow access to the ADC's on-board temperature sensor.

@hartytp
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hartytp commented Nov 8, 2018

ADC NC should be tied to GND according to the data sheet.

@hartytp
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hartytp commented Nov 8, 2018

We're driving the ADC AVDD and DVDD from the same supply. Usually, I would expect to provide separate supplies for these (e.g. connect the DVDD to P3V3A via an independent 33R resistor with a 1uF||100nF capacitor). @cjbe I guess the reason you chose not to do that in your design is that we keep the digital interface inactive during sampling so we don't need to worry about noise on DVDD. Is that correct, or is it worth isolating?

@hartytp
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hartytp commented Nov 8, 2018

I used tiny SMD shielded inductors that saturate at 3A.

Since the MAX1968 max output current is +-3A isn't it worth using inductors that saturate at something a bit higher than 3A. We don't want to operate the converter with the inductors close to saturation do we?

@hartytp
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hartytp commented Nov 8, 2018

@gkasprow it's definitely worth adding some schottky diodes to protect the ADC inputs in case the user messes up the wiring harness and connects the TEC outputs to the thermistor input. That would put 5V across the ADC inputs, resulting in an ADC input current beyond the 10mA abs maximum rating. Just use the same diodes on Sampler (to be extra sure, we can split the 100R into 50R->diodes->50R->ADC).

@hartytp
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hartytp commented Nov 8, 2018

not that it really matters, but afaict it's more natural to connect LX2 to tec_n and LX1 to tec_p (i.e. swap the _p and _n around on the tec connectors).

@hartytp
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hartytp commented Nov 8, 2018

Is it worth having a CMC on the TEC outputs to reduce EMI (there is quite a lot of common-mode noise on those outputs)?

@hartytp
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hartytp commented Nov 8, 2018

The TEC driver recommends having a 100uF electrolytic somewhere on the supply to smooth out ripples. Worth adding one?

@hartytp
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hartytp commented Nov 8, 2018

The TEC driver recommends having a 100uF electrolytic somewhere on the supply to smooth out ripples. Worth adding one?

NB on @cjbe's design this wasn't necessary since we had an external 5V supply with a big output capacitor. However on Thermostat the 5V is sourced from an internal 5V SMPS.

@hartytp
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hartytp commented Nov 8, 2018

Okay, that's everything I can think of for this design. @gkasprow not all those suggestions need to be implemented; they're just thoughts. Do what you think is best.

One closing comment, however: this design will be fairly robust to damage from various ways the output connectors could be mis-wired. There is only one thing I can see that will kill the design: shorting the LX2 output to ground. This is because the current limit measures the current from the LX1 pin (so shorting that pin to Vcc or GND shouldn't be an issue since the current limit protects it) but it doesn't check the return current. There's no way easy way around that with this TEC driver, and I think that's fine, but seems worth mentioning...

@gkasprow
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gkasprow commented Nov 8, 2018

We have to relay on 5V supply itnernal protection then.

@hartytp
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hartytp commented Nov 8, 2018

We have to relay on 5V supply itnernal protection then.

That can supply 8A, which is more than enough to trash one of the max chips.

I don't think there is any way of getting around this; mis-wiring the connector so that TEC_N, but not TEC_P, is shorted to V+ or GND will always kill this chip.

@hartytp
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hartytp commented Nov 8, 2018

@gkasprow anyway, I don't think this needs to turn into a multi-round review. Do what you think is best based on my feedback, and let me know when you're happy with the design. Once that's done I'll order a few boards from TS to play with.

@gkasprow
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gkasprow commented Nov 9, 2018

@hartytp protection diodes may kill the temperature stability.
We have to use ones with extremely well matched reverse current or with very low leakage like BAS416

@hartytp
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hartytp commented Nov 10, 2018

hmmm let's see @gkasprow. Here is a really crude analysis (correct me if I'm wrong here):

  • 3V3 across 20K ohm. Let's call it 100uA (1e-4A) sense current
  • Assume standard NTC with approx -4%/K, so -4e-5/mK
  • So, a 4e-9A leakage gives a 1mK error
  • So to match the circuit's stability of something like 0.1mK/K we need a max leakage temperature coefficient of approx 0.4nA/K

That's easily doable with appropriate diodes. However...

The more I think about it, the more I think the diodes were a bad idea. On second thoughts (as I pointed out above) given the design of the TEC controller IC, we can never make this circuit robust to all kinds of shorts between the various pins on the connector. So, is there any point in working hard to make some combinations work if it still dies when the TEC controller is shorted to GND?

Better to keep it simple and rely on some common sense from the user not to kill it.

@gkasprow
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The diode I proposed has only 0.5pA of leakage current
It will achieve 0.4nA current at roughly 100degrees.
obraz

@gkasprow
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I already added the diodes. If we discover that they ruin our temp stability, we can always remove them.

@hartytp
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hartytp commented Nov 10, 2018

Sounds good @gkasprow. Anyway, am I right in thinking that the leakage will be significantly lower when the reverse bias is only 1V or so?

Once we have the boards, we can easily make a temperature stability measurement to confirm that the performance matches our calculations. Use one channel to perform an open-loop measurement of the "temperature" of a precision 10k resistor, and use the other channel to temperature control the Thermostat board. Look at the reported "temperature" of the resistor as we change the actual temperature of Thermostat.

@gkasprow
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This is what I expect and probably leakage current won't be an issue here.

@gkasprow
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@hartytp please have a look at newest release.
I also created dedicated repo for Thorlabs version.
https://github.com/sinara-hw/thermostat_thorlabs

@hartytp
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hartytp commented Nov 10, 2018

@hartytp please have a look at newest release.

Great, thanks!

@jordens FWIW I'm planning to order a few of these next week, so any feedback you have before then will be gratefully received.

I also created dedicated repo for Thorlabs version.
https://github.com/sinara-hw/thermostat_thorlabs

FWIW, a Git branch is probably a better way of doing that.

@gkasprow
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These are two modules that don't have many common things. There won't be common firmware, chipset is different.

@hartytp
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hartytp commented Nov 10, 2018

Look beautiful @gkasprow! Many thanks for doing that, another great design!

While I'd be happy to send it off to manufacture as it is now, I had a few final thoughts:

  • One thing that did occur to me is that it would be nice to have a grounded "screening" connection on the screw terminals. EMI sensitivity can be a major source of error in these designs. Hopefully the digital ADC will reject most of that, but for long cables it's highly advisable to use screened twisted pair to connect the thermistor. So, it's nice to give users a convenient point to ground the screening. If there isn't room to add an extra connection to the screw terminals then don't worry. If it helps, the screening pin could be shared between the two screw terminals.
  • While we don't need a detailed power budget, we do need to give the user at least a rough indication of the max power the module can draw so that they can ensure they connect it to a suitable PoE supply
  • with the new ADC the error analysis needs tweaking. I'll do that next week once the design is finalised (I'll open a new issue) Edit: let's just delete the error analysis from the schematic. Once we've got the board, I'll post measured data to the Wiki. That's more useful than calculations anyway.
  • obvious point, but just to sanity check: is the TEC CMC rated to the right current (won't saturate etc) and has a low enough DC resistance to avoid excessive power dissipation
  • not that it really matters, but it feels like we should ground AIN4 on the ADC

@gkasprow
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CMC wont saturate up to 5A
Changed connectors to 5pin ones with GND
Grounded ADC AIN4

@gkasprow
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added power budget. We will fit within 20W. Continous PoE converter Pmax is 24W, 30 peak.

@hartytp
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hartytp commented Nov 11, 2018

Splendid :)

No further feedback from me then. Let's give others until end of Weds to give any further comments and then produce a batch (email Greg/Me/Wojciech if you want some).

@hartytp
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hartytp commented Nov 11, 2018

@gkasprow well, the only other comment I have is about the layout. The 24-bit ADC is packed in tightly between the microprocessor and the TEC driver, so there is quite a bit of potential for EMI issues.

I don't think there is much we can do to improve this without making the board quite a bit bigger, so let's build one and have a go. We can easily test this by using a precision 10k resistor instead of a thermistor and looking at the rms noise in the ADC measurements. We can also look at the change in measured temperature as a function of the TEC current with the device running open loop.

Anyway, hopefully this won't cause any issues, but it's worth being aware of it.

@gkasprow
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I designed it in such way to make sure the return currents don't pass via the ADC circuit.
I don't thin we would get any EMI issues.

@hartytp
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hartytp commented Nov 11, 2018

Okay, good! :)

@jordens
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jordens commented Nov 13, 2018

  • It's weird to use a PWM to control a PWM. If the MAX is just there to provide V/IP/IN limiting, some PWM-to-current loop, and an H bridge, then it seems misplaced. If there was no filter and just an H bridge driver from two suitably modulated pins of the µC and I/V sensing, that would be more straight forward. And you could do really nice sigma-delta modulation to get efficient spectral shaping of the output noise compared to that MAX. It might need about the same space. If the PID loop is digital, I would really want to stay digital all the way up to the H bridge. I am not doubting that you can get good performance with this. This is just to point out that this is an irritating design mismatch. Isn't there anything from the H bridge world that does this better?
  • Anti windup wont be straight forward (for the reason above). There is either wasted headroom between the actual limit and what's reported as limit or there is a dead zone where the reported limit (in the digital PID) is reached after the driver is already railed.
  • Should be possible to also connect I2C on the second TEC to the CPU. I2C2 or I2C3 (when moving STAT) seem doable on quick glance.
  • Please expose the UART not on individual pads but on a pin header.

@hartytp
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hartytp commented Nov 13, 2018

It's weird to use a PWM to control a PWM. If the MAX is just there to provide V/IP/IN limiting, some PWM-to-current loop, and an H bridge, then it seems misplaced. If there was no filter and just an H bridge driver from two suitably modulated pins of the µC and I/V sensing, that would be more straight forward. And you could do really nice sigma-delta modulation to get efficient spectral shaping of the output noise compared to that MAX. It might need about the same space. If the PID loop is digital, I would really want to stay digital all the way up to the H bridge. I am not doubting that you can get good performance with this. This is just to point out that this is an irritating design mismatch. Isn't there anything from the H bridge world that does this better?

For me, using the MAX chip mainly comes down to convenience. Its performance is pretty good, it packs a lot into a small board area with fairly low EMI, it's relatively cheap, and, most importantly, it reduces the amount of design + software development work we need to do to get a high-quality board up and running.

If we're going to switch to a roll-your own solution that requires more work (and probably costs more, requires more board space etc) then there should be a strong performance reason to do so. Do you think the MAX IC's noise etc performance won't be good enough for us?

This is just to point out that this is an irritating design mismatch

I agree that it's conceptually less neat than rolling our own, but that doesn't mean it's not the best means of achieving the result we want.

If you're keen on an H bridge approach, can you suggest a topology + some components you'd like to use?

@jordens
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jordens commented Nov 13, 2018

I'm not suggesting to roll your own H bridge. There are small fully integrated H bridges with gate drivers and power-MOS, some even with current sensing, and multiple channels in one package. And I am not doubting the specifications of the MAX. I'd just try to get a bridge driver that doesn't come with its own PWM modulator and current loop. Instead I would look at those integrated bridges/drivers and add the missing features (current/voltage sensing/limiting). That all looks well within the scope of the on-chip ADCs (I/V sensing and limiting is not a precision or high resolution job). Instead of one modulated control signal going to the driver you'd now have two. You'd save on the filtering components and you'd get voltage monitoring as well. What else is missing that you need the MAX for? Does it have better performance than a typical bridge driver? From the datasheet it is meant to be used in an analog loop, not in a digital one.
Bringing the digital signal all the way to the bridge instead of reconstructing it with a filter and steering a PWM to a current sensor would at least allow you to do noise shaping and get voltage sensing for free. It looks likely that it is also better suited for low thermal mass applications where the switching pattern needs to change.
Performance is probably going to be fine for most applications. And if it hinges on me finding a better bridge chip doing the design, then I'll pass ;) And this is probably fine as a first iteration.
In any case, don't you want to wait and debug the parts of the design shared with the Thorlabs version first before signing this one off?
We'd be interested in testing this one for ultra-low thermal mass control at some point as well.

@hartytp
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hartytp commented Nov 13, 2018

Performance is probably going to be fine for most applications. And if it hinges on me finding a better bridge chip doing the design, then I'll pass ;) And this is probably fine as a first iteration.

Well, it hinges on someone doing the design. I'm short on time right now and the MAX IC will be absolutely fine for all the applications I have in mind, so it won't be me who does all the legwork for this. If you can convince someone else to do the design work required for this then it's fine by me.

What do you think @gkasprow

In any case, don't you want to wait and debug the parts of the design shared with the Thorlabs version first before signing this one off?

By this point, there isn't much common between the two boards, and I have some temperature control needs coming up for which the Thorlabs chip is a bit marginal. So, unless someone is planning to test the Thorlabs version of Thermostat reasonably soon then I'd prefer to press on to manufacture.

@gkasprow
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@jordens The MAX works at 1MHz. Even with 10 bit PWM you would need 1GHz clock in CPU. One can do some tricks with 8 bit PWM and noise shaping but IMHO it is not worth the effort.

@jordens
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jordens commented Nov 13, 2018

The PWM from the CPU to the MAX will also need dithering to get the needed resolution. There is no change from that.

@jordens
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jordens commented Nov 13, 2018

Even if you were to stay at plain PWM from the CPU, you get even more resolution by adjusting the frequency. The continued fraction algorithm to do that will fit just fine into the ~10ms sample rate. I assume that's what @cjbe was already doing.

@hartytp
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hartytp commented Nov 13, 2018

Even if you were to stay at plain PWM from the CPU, you get even more resolution by adjusting the frequency. The continued fraction algorithm to do that will fit just fine into the ~10ms sample rate. I assume that's what @cjbe was already doing.

@cjbe

@gkasprow
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I"d like to treat the version with MAX chip as a first iteration.
Doing own HW bridge with cycle per cycle current sensing needs quite sophisticated mechanisms inside of the CPU.
Once I did laboratory grade BLDC motor driver using brand new special AVR chip dedicated for that tasks with special high resolution PWMs with HW dithering, synchronous ADCs, HW protections, etc but it took enormous amount of time due to bugs in the silicon. Finally I had to build required functions writing critical parts in assembly. And I burned a lot of MOSFETs during testing because HW protection functions (programmed using fuses) did not work as expected causing spectacular failures by switching top and bottom switch at the time :)
Every design can be made better, but if MAX chip does the job and simplifies R&D, let's use it. If we discover that it does not meet our expectations, we will switch to something else.

@hartytp
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hartytp commented Nov 14, 2018

@gkasprow It sounds like the plan is to keep the MAX IC for Thermostat v2.0. If we decide it's not good enough, we can replace it in v3.0. Thermostat v2.0 will give us a high-performance board that we can develop most of the required firmware on.

Please could you update following @jordens comments (copied below) and then upload a release and close this issue?

  • also connect I2C on the second TEC to the CPU. I2C2 or I2C3 (when moving STAT) seem doable on quick glance.
  • Please expose the UART not on individual pads but on a pin header.

@gkasprow
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done for both designs.

@hartytp
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hartytp commented Nov 17, 2018

Thanks!

Okay, let's close this. We'll keep the new TEC driver design in mind for v3.0

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