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bug fix for xilinx/UltraScale+/clocking/rtl/ClockManagerUltraScale.vhd #1108

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merged 1 commit into from
Sep 1, 2023
Merged

bug fix for xilinx/UltraScale+/clocking/rtl/ClockManagerUltraScale.vhd #1108

merged 1 commit into from
Sep 1, 2023

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ruck314
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@ruck314 ruck314 commented Sep 1, 2023

Description

  • Lefthand signal to be exchanged with rigthhand in assignment
  • Confirmed this patch was already applied to xilinx/7Series/general/rtl/ClockManager7.vhd and xilinx/UltraScale/clocking/rtl/ClockManagerUltraScale.vhd
  • Only xilinx/UltraScale+/clocking/rtl/ClockManagerUltraScale.vhd was missing this patch

This was referenced Sep 1, 2023
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@ruck314 ruck314 merged commit 6a1992e into pre-release Sep 1, 2023
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@ruck314 ruck314 deleted the ClockManagerUltraScale-fix branch September 1, 2023 17:01
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@bengineerd bengineerd bengineerd approved these changes

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