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intel10g: Fix error in tx prefetch enable for VF mode
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lukego committed Sep 28, 2015
1 parent ddabbd6 commit c29f053
Showing 1 changed file with 6 additions and 1 deletion.
7 changes: 6 additions & 1 deletion src/apps/intel/intel10g.lua
Original file line number Diff line number Diff line change
Expand Up @@ -135,6 +135,7 @@ function M_sf:init ()
:init_statistics()
:init_receive()
:init_transmit()
:init_txdesc_prefetch()
:wait_enable()
:wait_linkup()

Expand Down Expand Up @@ -420,11 +421,15 @@ end
function M_sf:init_transmit ()
self.r.HLREG0:set(bits{TXCRCEN=0})
self:set_transmit_descriptors()
self.r.TXDCTL:set(bits{Enable=25, SWFLSH=26, hthresh=8} + 32)
self.r.DMATXCTL:set(bits{TE=0})
return self
end

function M_sf:init_txdesc_prefetch ()
self.r.TXDCTL:set(bits{SWFLSH=26, hthresh=8} + 32)
return self
end

function M_sf:set_transmit_descriptors ()
self.r.TDBAL(self.txdesc_phy % 2^32)
self.r.TDBAH(self.txdesc_phy / 2^32)
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