NPU disable unused PCIe BAR #225

msiddare · 2021-07-01T03:06:13Z

NPU device enumeration was failing because of an issue in the cisco
ASIC. This patch will fix address the issue by disabling unused BAR.

Signed-off-by: Madhava Reddy Siddareddygari msiddare@cisco.com

NPU device enumeration was failing because of an issue in the cisco ASIC. This patch will fix address the issue by disabling unused BAR. Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

paulmenzel

Thank you for your patches, but reviewing your submission takes too much time because they have so many formal errors. It’d be great, if you got acquainted with the Linux kernel development processes, and followed them.

paulmenzel · 2021-07-05T08:01:04Z

patch/cisco-npu-disable-other-bars.patch

+From 2bc0b2e84866a7733fc05a34bd8a93e165db99cc Mon Sep 17 00:00:00 2001
+From: Madhava Reddy Siddareddygari <msiddare@cisco.com>
+Date: Tue, 9 Mar 2021 13:54:28 -0800
+Subject: [PATCH] NPU disable other bars
+
+    This is a port of IOS XR patch
+
+        Spitfire-pacific-disable-all-bars-other-than-0.patch
+
+    to Debian kernel. Modifications from IOS XR:
+
+    a. Only issue an INFO message for changed resources
+    b. Include the previous resource data in the INFO message
+    c. Prepare for the possibility of applying patch to
+       future NPU revisions.
+
+    Original patch message follows:
+
+    For Pacific, only bar 0 is valid. Hence disable all other bars as a work
+    around for spitfire
+
+    CDETS: CSCvi15029
+
+    Signed-off-by: Gaurav Gupta <gauragup@cisco.com>
+    Signed-off-by: Subha Keshavaraj <subkesha@cisco.com>


It looks like you just copied the output from git show. Please create the patch with git format-patch ….

paulmenzel · 2021-07-05T08:01:30Z

patch/cisco-npu-disable-other-bars.patch

+
+    This is a port of IOS XR patch
+
+        Spitfire-pacific-disable-all-bars-other-than-0.patch


Please provide a git commit hash or URL for this patch.

paulmenzel · 2021-07-05T08:02:09Z

patch/cisco-npu-disable-other-bars.patch

+ */
+static void silicon_one_fixup(struct pci_dev *dev)
+{
+	int i;


This does not follow the Linux coding style. Please check patches with checkpatch.pl script in the Linux kernel.

Sorry, Firefox display issues in the browser.

Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

paulmenzel · 2021-07-14T06:05:26Z

patch/cisco-npu-disable-other-bars.patch

+Further debugging and consultion with Hardware team, issue seems
+to be related to ASIC and workaround suggested is to disable
+unused PCI BAR
+


Please also paste the new log messages from one device to the commit message.

Still open.

paulmenzel · 2021-07-14T06:06:15Z

patch/cisco-npu-disable-other-bars.patch

+			continue;
+
+		dev_info(&dev->dev,
+			"Cisco Silicon One BAR %d %pR fixed up\n", i, r);


Maybe:

Cisco Silicon One BAR %d %pR disabled due to NPU hardware bug

Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

msiddare · 2021-08-16T21:41:57Z

Review comments incorporated and updated series file as per meeting discussion

paulmenzel

Please get it reviewed by the Linux subsystem maintainers.

paulmenzel · 2021-08-16T22:42:18Z

patch/cisco-npu-disable-other-bars.patch

+	 * Pacific device was misbehaving during rescan not enumerating
+	 * memory for bar. Due to this HW issue, added this workaround
+	 * and verified that during rescan memory gets assigned properly
+	 * to the device. This is only a temporary fix for pacific ASIC


Maybe:

Due to HW bug, Pacific device is misbehaving during rescan by not enumerating memory for that BAR. Work around it and verify, that during rescan memory gets assigned properly to the device.

paulmenzel · 2021-08-16T22:42:40Z

patch/cisco-npu-disable-other-bars.patch

+	 * memory for bar. Due to this HW issue, added this workaround
+	 * and verified that during rescan memory gets assigned properly
+	 * to the device. This is only a temporary fix for pacific ASIC
+	 * only


Is it really temporary?

paulmenzel · 2021-08-16T22:44:15Z

patch/cisco-npu-disable-other-bars.patch

+	dev->class = PCI_CLASS_MEMORY_OTHER << 8;
+	dev_info(&dev->dev, "Cisco Silicon One class adjusted\n");
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SYNOPSYS, PCI_DEVICE_ID_LEABA_PACIFIC,


Why PCI_VENDOR_ID_SYNOPSYS?

paulmenzel · 2021-08-16T22:45:10Z

patch/cisco-npu-disable-other-bars.patch

+/*
+ * For Pacific A0, only BAR 0 is valid
+ */
+static void silicon_one_fixup(struct pci_dev *dev)


I’d think, the function name needs to include cisco somehow.

paulmenzel · 2021-08-16T22:46:12Z

patch/cisco-npu-disable-other-bars.patch

+From 0be339b4c8468138dfe1a30de29511e94b846af6 Mon Sep 17 00:00:00 2001
+From: Madhava Reddy Siddareddygari <msiddare@cisco.com>
+Date: Mon, 16 Aug 2021 12:55:37 -0700
+Subject: [PATCH] NPU disable unused PCI BAR


Please make it an upstreamable commit message summary (How to Write a Git Commit Message).

paulmenzel · 2021-08-16T22:46:35Z

patch/cisco-npu-disable-other-bars.patch

+Further debugging and consultion with Hardware team, issue seems
+to be related to ASIC and workaround suggested is to disable
+unused PCI BAR
+


Still open.

patch/cisco-npu-disable-other-bars.patch

paulmenzel · 2021-08-16T22:47:27Z

patch/cisco-npu-disable-other-bars.patch

+#define PCI_DEVICE_ID_LEABA_KRYPTON    0xa006
+
+/*
+ * For Pacific A0, only BAR 0 is valid


Please add an errata document name and number for reference.

msiddare · 2021-09-21T22:56:31Z

Closing this PR as issue is observed only on early P0 proto boards.

For Cisco ASIC only BAR0 is valid. Not disabling other BAR's was resulting in pci_enable_device function failure in P0 Pacific ASIC's. Further debugging and consultion with Hardware team, issue seems to be related to only P0 version of ASIC and workaround suggested is to disable unused PCI BAR. This is same pull request reviewed ealier, sonic-net#225 Cisco experimented removing this patch, but identified that there are boards in the field with Pacific ASIC. This patch is need for these ASIC's to work, hence re-submitting. Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

For Cisco ASIC only BAR0 is valid. Not disabling other BARs was resulting in pci_enable_device function failure in P0 Pacific ASIC's. Further debugging and consultation with Hardware team, issue seems to be related to only P0 version of ASIC and workaround suggested is to disable unused PCI BAR. This is same pull request reviewed ealier, #225 Cisco experimented removing this patch, but identified that there are boards in the field with Pacific ASIC. This patch is need for these ASIC's to work, hence re-submitting. Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

NPU disable unused PCIe BAR

f59eed4

NPU device enumeration was failing because of an issue in the cisco ASIC. This patch will fix address the issue by disabling unused BAR. Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

paulmenzel reviewed Jul 5, 2021

View reviewed changes

msiddare added 2 commits July 12, 2021 23:32

Updated with review comments

a199d39

Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

Updated patch with review comments

ac3d687

Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

paulmenzel reviewed Jul 14, 2021

View reviewed changes

Review comments incorporated

81cec9d

Signed-off-by: Madhava Reddy Siddareddygari <msiddare@cisco.com>

paulmenzel suggested changes Aug 16, 2021

View reviewed changes

Merge branch 'master' into cisco/npu-fix

8fa81b8

msiddare closed this Sep 21, 2021

msiddare deleted the cisco/npu-fix branch September 21, 2021 22:56

msiddare mentioned this pull request Nov 19, 2021

NPU disabled used PCIe BAR #248

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NPU disable unused PCIe BAR #225

NPU disable unused PCIe BAR #225

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msiddare commented Sep 21, 2021


		This is a port of IOS XR patch

		Spitfire-pacific-disable-all-bars-other-than-0.patch

NPU disable unused PCIe BAR #225

NPU disable unused PCIe BAR #225

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msiddare commented Jul 1, 2021

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msiddare commented Aug 16, 2021

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msiddare commented Sep 21, 2021