sim/testsuite/or1k: Update fpu64a32 test for new insn syntax

stffrdhrn · Apr 25, 2019 · b1bd2c6 · b1bd2c6
1 parent a9c728d
commit b1bd2c6
Showing 1 changed file with 9 additions and 9 deletions.
diff --git a/sim/testsuite/sim/or1k/fpu64a32.S b/sim/testsuite/sim/or1k/fpu64a32.S
@@ -121,41 +121,41 @@ start_tests:
 	PRINT_NEWLINE_TO_CONSOLE
 
 	/* Convert the big long to a double. */
-	lf.itof.d r16, r16
+	lf.itof.d r16,r18, r16,r18
 	REPORT_REG_TO_CONSOLE r16
 	REPORT_REG_TO_CONSOLE r18
 
 	/* Convert the double back to a long, it should match before. */
-	lf.ftoi.d r16, r16
-	lf.itof.d r16, r16
+	lf.ftoi.d r16,r18, r16,r18
+	lf.itof.d r16,r18, r16,r18
 
 	REPORT_REG_TO_CONSOLE r16
 	REPORT_REG_TO_CONSOLE r18
 
 	PRINT_NEWLINE_TO_CONSOLE
 
 	/* Add and subtract some double values.  */
-	lf.add.d r12, r12, r14
+	lf.add.d r12,r13, r12,r13, r14,r15
 	REPORT_REG_TO_CONSOLE r12
 	REPORT_REG_TO_CONSOLE r13
 
-	lf.sub.d r12, r12, r14
+	lf.sub.d r12,r13, r12,r13, r14,r15
 	REPORT_REG_TO_CONSOLE r12
 	REPORT_REG_TO_CONSOLE r13
 	PRINT_NEWLINE_TO_CONSOLE
 
 	/* Multiply and divide double values.  */
-	lf.mul.d r12, r12, r14
+	lf.mul.d r12,r13, r12,r13, r14,r15
 	REPORT_REG_TO_CONSOLE r12
 	REPORT_REG_TO_CONSOLE r13
 
-	lf.div.d r12, r12, r14
+	lf.div.d r12,r13, r12,r13, r14,r15
 	REPORT_REG_TO_CONSOLE r12
 	REPORT_REG_TO_CONSOLE r13
 	PRINT_NEWLINE_TO_CONSOLE
 
 	/* Test lf.sfge.s set flag if r6 >= r10.  */
-	lf.sfge.d r12, r14
+	lf.sfge.d r12,r13, r14,r15
 	MOVE_FROM_SPR r2, SPR_SR
 	REPORT_BIT_TO_CONSOLE r2, SPR_SR_F
 	PRINT_NEWLINE_TO_CONSOLE
@@ -164,7 +164,7 @@ start_tests:
 	MOVE_FROM_SPR r2, SPR_FPCSR
 	l.ori	r2, r2, 0x1
 	MOVE_TO_SPR SPR_FPCSR, r2
-div0:	lf.div.d r2, r12, r0
+div0:	lf.div.d r2,r3, r12,r13, r0,r1
 	REPORT_EXCEPTION div0
 	PRINT_NEWLINE_TO_CONSOLE