or1k: fix up docs for new operations

gcc/config/or1k/or1k.opt

@@ -29,14 +29,18 @@ mhard-mul
 Target RejectNegative InverseMask(SOFT_MUL).
 Use hardware multiply instructions, use -msoft-mul for emulation.
 
+msoft-float
+Target RejectNegative InverseMask(HARD_FLOAT)
+Use gcc provided software routines for floating point operations.
+
 mhard-float
-Target Mask(HARD_FLOAT)
+Target RejectNegative Mask(HARD_FLOAT)
 Use hardware floating point instructions.
 
 mdouble-float
 Target Mask(DOUBLE_FLOAT)
 Allows generation of binaries which support 64-bit doubles on 32-bit systems by
-soring doubles in register pairs.
+storing doubles in register pairs.
 
 mcmov
 Target RejectNegative Mask(CMOV)

gcc/doc/invoke.texi

@@ -1028,6 +1028,7 @@ Objective-C and Objective-C++ Dialects}.
 @emph{OpenRISC Options}
 @gccoptlist{-mboard=@var{name}  -mnewlib  -mhard-mul  -mhard-div @gol
 -msoft-mul  -msoft-div @gol
+-msoft-float  -mhard-float  -mdouble-float @gol
 -mcmov  -mror  -msext  -msfimm  -mshftimm}
 
 @emph{PDP-11 Options}
@@ -23557,6 +23558,20 @@ default.
 Generate code for hardware which supports multiply instructions.  This is the
 default.
 
+@item -msoft-float
+@opindex msoft-float
+Generate code which uses library calls for floating point operations.  This is
+the default.
+
+@item -mhard-float
+@opindex mhard-float
+Generate code for hardware which supports floating point instructions.
+
+@item -mdouble-float
+@opindex mdouble-float
+Generate code for hardware which supports 64-bit floating point operations
+on 32-bit OpenRISC targets.
+
 @item -mcmov
 @opindex mcmov
 Generate code for hardware which supports the conditional move (@code{l.cmov})