Merge pull request #1250 from simon-wh/feature/gd32f3_xl_ob

Added support for option bytes to F1xx_XLD (GD32F30x)
stlink-org · Jul 14, 2022 · 1724154 · 1724154
2 parents 951859c + 54e8234
commit 1724154
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Showing 3 changed files with 4 additions and 3 deletions.
diff --git a/config/chips/F1xx_XLD.chip b/config/chips/F1xx_XLD.chip
@@ -9,6 +9,6 @@ flash_pagesize 0x800         // 2 KB
 sram_size 0x18000            // 96 KB
 bootrom_base 0x1fffe000
 bootrom_size 0x1800          // 6 KB
-option_base 0x0
-option_size 0x0
+option_base 0x1ffff800       // STM32_F0_OPTION_BYTES_BASE
+option_size 0x10             // 16 B
 flags swo
diff --git a/doc/devices_boards.md b/doc/devices_boards.md
@@ -90,6 +90,7 @@ Tested non-official ST boards [incl. STLINK programmers]:
 | Product-Code | Chip-ID | STLINK<br />Programmer | Boards                             |
 | ------------ | ------- | ---------------------- | ---------------------------------- |
 | GD32F303VGT6 | 0x430   | [v2]                   | STM32F303 clone from GigaDevice GD |
+| GD32F303CGT6 | 0x430   | [v2]                   | STM32F303 clone from GigaDevice GD |
 
 ## STM32F4 / ARM Cortex M4F
 

diff --git a/src/flashloader.c b/src/flashloader.c
@@ -94,7 +94,7 @@ static void set_flash_cr_pg(stlink_t *sl, unsigned bank) {
     cr_reg = (bank == BANK_1) ? FLASH_H7_CR1 : FLASH_H7_CR2;
     x |= (1 << FLASH_H7_CR_PG);
   } else {
-    cr_reg = FLASH_CR;
+    cr_reg = (bank == BANK_1) ? FLASH_CR : FLASH_CR2;
     x = (1 << FLASH_CR_PG);
   }