Set option_size to 128 B for G0-series (#1194)

stlink-org · Jan 7, 2023 · 1f152a7 · 1f152a7
1 parent d053470
commit 1f152a7
Show file tree

Hide file tree

Showing 4 changed files with 7 additions and 7 deletions.
diff --git a/config/chips/G03x_G04x.chip b/config/chips/G03x_G04x.chip
@@ -10,5 +10,5 @@ sram_size 0x2000             // 8 KB
 bootrom_base 0x1fff0000
 bootrom_size 0x2000          // 8 KB
 option_base 0x1fff7800       // STM32_G0_OPTION_BYTES_BASE
-option_size 0x4              // 4 B
+option_size 0x80             // 128 B
 flags none
diff --git a/config/chips/G05x_G06x.chip b/config/chips/G05x_G06x.chip
@@ -1,7 +1,7 @@
 # Chip-ID file for STM32G05x / STM32G06x device
 #
 dev_type STM32G05x_G06x
-ref_manual_id 0444
+ref_manual_id 0444           // also RM454
 chip_id 0x456                // STM32_CHIPID_G0_CAT4
 flash_type G0
 flash_size_reg 0x1fff75e0
@@ -10,5 +10,5 @@ sram_size 0x4800             // 18 KB
 bootrom_base 0x1fff0000
 bootrom_size 0x7000          // 28 KB
 option_base 0x1fff7800       // STM32_G0_OPTION_BYTES_BASE
-option_size 0x4              // 4 B
+option_size 0x80             // 128 B
 flags none
diff --git a/config/chips/G07x_G08x.chip b/config/chips/G07x_G08x.chip
@@ -1,7 +1,7 @@
 # Chip-ID file for STM32G07x / STM32G08x device
 #
 dev_type STM32G07x_G08x
-ref_manual_id 0444
+ref_manual_id 0444           // also RM454
 chip_id 0x460                // STM32_CHIPID_G0_CAT2
 flash_type G0
 flash_size_reg 0x1fff75e0
@@ -10,5 +10,5 @@ sram_size 0x9000             // 36 KB
 bootrom_base 0x1fff0000
 bootrom_size 0x7000          // 28 KB
 option_base 0x1fff7800       // STM32_G0_OPTION_BYTES_BASE
-option_size 0x4              // 4 B
+option_size 0x80             // 128 B
 flags none
diff --git a/config/chips/G0Bx_G0Cx.chip b/config/chips/G0Bx_G0Cx.chip
@@ -1,7 +1,7 @@
 # Chip-ID file for STM32G0Bx / STM32G0Cx device
 #
 dev_type STM32G0Bx_G0Cx
-ref_manual_id 0444
+ref_manual_id 0444           // also RM454
 chip_id 0x467                // STM32_CHIPID_G0_CAT3
 flash_type G0
 flash_size_reg 0x1fff75e0
@@ -10,5 +10,5 @@ sram_size 0x24000            // 144 KB
 bootrom_base 0x1fff0000
 bootrom_size 0x7000          // 28 KB
 option_base 0x1fff7800       // STM32_G0_OPTION_BYTES_BASE
-option_size 0x4              // 4 B
+option_size 0x80             // 128 B
 flags dualbank