Add writing and reading STM32WL option bytes

config/chips/WLx5.chip

@@ -9,6 +9,6 @@ flash_pagesize 0x800         // 2 KB
 sram_size 0x10000            // 64 KB
 bootrom_base 0x1fff0000
 bootrom_size 0x7000          // 28 KB
-option_base 0x1fffc000
+option_base 0x1fff7800
 option_size 0x10             // 16 B
 flags swo

inc/stm32flash.h

@@ -162,9 +162,11 @@
 #define STM32WB_FLASH_SRRVR (STM32WB_FLASH_REGS_ADDR + 0x84)
 
 // WB Flash control register.
-#define STM32WB_FLASH_CR_STRT (16)    /* Start */
-#define STM32WB_FLASH_CR_OPTLOCK (30) /* Option Lock */
-#define STM32WB_FLASH_CR_LOCK (31)    /* Lock */
+#define STM32WB_FLASH_CR_STRT (16)       /* Start */
+#define STM32WB_FLASH_CR_OPTSTRT (17)    /* Start writing option bytes */
+#define STM32WB_FLASH_CR_OBL_LAUNCH (27) /* Forces the option byte loading */
+#define STM32WB_FLASH_CR_OPTLOCK (30)    /* Option Lock */
+#define STM32WB_FLASH_CR_LOCK (31)       /* Lock */
 // WB Flash status register.
 #define STM32WB_FLASH_SR_ERROR_MASK (0x3f8) /* SR [9:3] */
 #define STM32WB_FLASH_SR_PROGERR (3)        /* Programming alignment error */

src/option_bytes.c

@@ -472,6 +472,57 @@ static int stlink_write_option_bytes_h7(stlink_t *sl, uint8_t *base,
   return 0;
 }
 
+/**
+ * Write option bytes
+ * @param sl
+ * @param addr of the memory mapped option bytes
+ * @param base option bytes to write
+ * @return 0 on success, -ve on failure.
+ */
+static int stlink_write_option_bytes_wb(stlink_t *sl, uint8_t *base,
+                                        stm32_addr_t addr, uint32_t len) {
+  /* Write options bytes */
+  uint32_t val;
+  int ret = 0;
+  (void)len;
+  uint32_t data;
+
+  clear_flash_error(sl);
+
+  while (len != 0) {
+    write_uint32((unsigned char *)&data,
+                 *(uint32_t *)(base)); // write options bytes
+
+    WLOG("Writing option bytes %#10x to %#10x\n", data, addr);
+    stlink_write_debug32(sl, addr, data);
+    wait_flash_busy(sl);
+
+    if ((ret = check_flash_error(sl))) {
+      break;
+    }
+
+    len -= 4;
+    addr += 4;
+    base += 4;
+  }
+
+  // Set Options Start bit
+  stlink_read_debug32(sl, STM32WB_FLASH_CR, &val);
+  val |= (1 << STM32WB_FLASH_CR_OPTSTRT);
+  stlink_write_debug32(sl, STM32WB_FLASH_CR, val);
+
+  wait_flash_busy(sl);
+
+  ret = check_flash_error(sl);
+
+  // Reload options
+  stlink_read_debug32(sl, STM32WB_FLASH_CR, &val);
+  val |= (1 << STM32WB_FLASH_CR_OBL_LAUNCH);
+  stlink_write_debug32(sl, STM32WB_FLASH_CR, val);
+
+  return (ret);
+}
+
 /**
  * Write option bytes
  * @param sl
@@ -536,6 +587,9 @@ int stlink_write_option_bytes(stlink_t *sl, stm32_addr_t addr, uint8_t *base,
   case STM32_FLASH_TYPE_H7:
     ret = stlink_write_option_bytes_h7(sl, base, addr, len);
     break;
+  case STM32_FLASH_TYPE_WB_WL:
+    ret = stlink_write_option_bytes_wb(sl, base, addr, len);
+    break;
   default:
     ELOG("Option bytes writing is currently not implemented for connected "
          "chip\n");