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Fix "unkown chip id", piped output and st-util -v (#763)
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* Set SWD clock before using SWD (#107, #568 ?)

* Make st-util -v print more than default

* Flush output streams explicitly. Fix #665

On Win32 redirecting streams makes them buffered, therefore without
flushing there would be no output before exit. Stdout and stderr are
also often buffered differently, making them disordered.
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jicksaw authored and xor-gate committed Jan 24, 2019
1 parent af325bb commit 30de1b3
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Showing 3 changed files with 9 additions and 4 deletions.
2 changes: 1 addition & 1 deletion src/gdbserver/gdb-server.c
Original file line number Diff line number Diff line change
Expand Up @@ -151,7 +151,7 @@ int parse_options(int argc, char** argv, st_state_t *st) {
if (optarg) {
st->logging_level = atoi(optarg);
} else {
st->logging_level = DEFAULT_LOGGING_LEVEL;
st->logging_level = DEBUG_LOGGING_LEVEL;
}
break;
case '1':
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5 changes: 5 additions & 0 deletions src/logging.c
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,10 @@ int ugly_log(int level, const char *tag, const char *format, ...) {
if (level > max_level) {
return 0;
}

// Flush to maintain order of streams
fflush(stdout);

va_list args;
va_start(args, format);
time_t mytt = time(NULL);
Expand All @@ -46,6 +50,7 @@ int ugly_log(int level, const char *tag, const char *format, ...) {
break;
}
vfprintf(stderr, format, args);
fflush(stderr);
va_end(args);
return 1;
}
6 changes: 3 additions & 3 deletions src/usb.c
Original file line number Diff line number Diff line change
Expand Up @@ -923,6 +923,9 @@ stlink_t *stlink_open_usb(enum ugly_loglevel verbose, bool reset, char serial[16
// Initialize stlink version (sl->version)
stlink_version(sl);

// Set the stlink clock speed (default is 1800kHz)
stlink_set_swdclk(sl, STLINK_SWDCLK_1P8MHZ_DIVISOR);

if (reset) {
if( sl->version.stlink_v > 1 ) stlink_jtag_reset(sl, 2);
stlink_reset(sl);
Expand All @@ -931,9 +934,6 @@ stlink_t *stlink_open_usb(enum ugly_loglevel verbose, bool reset, char serial[16

ret = stlink_load_device_params(sl);

// Set the stlink clock speed (default is 1800kHz)
stlink_set_swdclk(sl, STLINK_SWDCLK_1P8MHZ_DIVISOR);

on_libusb_error:
if (ret == -1) {
stlink_close(sl);
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