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Improved support for STM32G0xx series. Fix for (#850 #857) (identical…
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… to #825)
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Nightwalker-87 committed Feb 21, 2020
1 parent 90997ed commit 7c0ebda
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Showing 2 changed files with 8 additions and 8 deletions.
6 changes: 3 additions & 3 deletions src/chipid.c
Original file line number Diff line number Diff line change
Expand Up @@ -522,9 +522,9 @@ static const struct stlink_chipid_params devices[] = {
.bootrom_size = 0x2000
},
{
// STM32G031/041 (from RM0444)
// STM32GG030/031/041 (from RM0444)
.chip_id = STLINK_CHIPID_STM32_G0_CAT1,
.description = "G031/G041 device",
.description = "G030/G031/G041 device",
.flash_type = STLINK_FLASH_TYPE_G0,
.flash_size_reg = 0x1FFF75E0, // Section 38.2
.flash_pagesize = 0x800, // 2K (sec 3.2)
Expand All @@ -535,7 +535,7 @@ static const struct stlink_chipid_params devices[] = {
{
// STM32G071/081 (from RM0444)
.chip_id = STLINK_CHIPID_STM32_G0_CAT2,
.description = "G071/G081 device",
.description = "G070/G071/G081 device",
.flash_type = STLINK_FLASH_TYPE_G0,
.flash_size_reg = 0x1FFF75E0, // Section 38.2
.flash_pagesize = 0x800, // 2K (sec 3.2)
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10 changes: 5 additions & 5 deletions src/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -2617,7 +2617,7 @@ static int stlink_write_option_bytes_g0x(stlink_t *sl, uint8_t* base, uint32_t l
uint32_t val;

if(len != 4) {
ELOG("Wrong length for writting option bytes, must be 4 is %d\n", len);
ELOG("Wrong length for writing option bytes, must be 4 is %d\n", len);
return -1;
}

Expand Down Expand Up @@ -2811,7 +2811,7 @@ static int stlink_write_option_bytes_l1(stlink_t *sl, uint8_t* base, stm32_addr_
if( data != val ) {
WLOG("Writing option bytes 0x%04x\n", data);
stlink_write_debug32(sl, addr, data);

stlink_read_debug32(sl, addr, &val);
WLOG("Option bytes is 0x%08x\n",val);
}
Expand All @@ -2829,11 +2829,11 @@ static int stlink_write_option_bytes_l1(stlink_t *sl, uint8_t* base, stm32_addr_
if( data != val ) {
WLOG("Writing 2nd option bytes 0x%04x\n", data);
stlink_write_debug32(sl, addr+4, data);

stlink_read_debug32(sl, addr+4, &val);
WLOG("2nd option bytes is 0x%08x\n",val);
}
}
}

/* Reload options */
stlink_read_debug32(sl, STM32L1_FLASH_REGS_ADDR + FLASH_PECR_OFF, &val);
Expand Down Expand Up @@ -3116,7 +3116,7 @@ int stlink_write_option_bytes(stlink_t *sl, stm32_addr_t addr, uint8_t* base, ui
else if((sl->chip_id == STLINK_CHIPID_STM32_L496X) && (addr == STM32_L496X_OPTION_BYTES_BASE)) {
return stlink_write_option_bytes_l496x(sl, base, len);
}
else if( ( (sl->chip_id == STLINK_CHIPID_STM32_L152_RE) || (sl->chip_id == STLINK_CHIPID_STM32_L1_HIGH) )
else if( ( (sl->chip_id == STLINK_CHIPID_STM32_L152_RE) || (sl->chip_id == STLINK_CHIPID_STM32_L1_HIGH) )
&& ( (addr == STM32_L1_OPTION_BYTES_BASE) || (addr == STM32_L1_OPTION_BYTES_BASE+4) ) ) {
return stlink_write_option_bytes_l1(sl, base, addr, len);
}
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