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Updated device parametres
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- Human-readable  FLASH_TYPE in .chip files
- Added enum for STM32_CORE_IDs
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@Nightwalker-87
Nightwalker-87 committed Jan 20, 2022
1 parent 80b05c5 commit 8d96e76
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Showing 64 changed files with 123 additions and 113 deletions.
2 changes: 1 addition & 1 deletion config/chips/F03x.chip
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dev_type STM32F03x
ref_manual_id 0091
chip_id 0x444 // STM32_CHIPID_F0xx_SMALL
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x400 // 1 KB
sram_size 0x1000 // 4 KB
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2 changes: 1 addition & 1 deletion config/chips/F04x.chip
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dev_type STM32F04x
ref_manual_id 0091
chip_id 0x445 // STM32_CHIPID_F04
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x400 // 1 KB
sram_size 0x1800 // 6 KB
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2 changes: 1 addition & 1 deletion config/chips/F05x.chip
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dev_type STM32F05x
ref_manual_id 0091
chip_id 0x440 // STM32_CHIPID_F0
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x400 // 1 KB
sram_size 0x2000 // 8 KB
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2 changes: 1 addition & 1 deletion config/chips/F07x.chip
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dev_type STM32F07x
ref_manual_id 0091
chip_id 0x448 // STM32_CHIPID_F0_CAN
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0x4000 // 16 KB
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2 changes: 1 addition & 1 deletion config/chips/F09x.chip
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dev_type STM32F09x
ref_manual_id 0091
chip_id 0x442 // STM32_CHIPID_F09x
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0x8000 // 32 KB
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2 changes: 1 addition & 1 deletion config/chips/F1xx_CL.chip
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dev_type STM32F1xx_CL
ref_manual_id 0008
chip_id 0x418 // STM32_CHIPID_F1_CONN
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7e0
flash_pagesize 0x800 // 2 KB
sram_size 0x10000 // 64 KB
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2 changes: 1 addition & 1 deletion config/chips/F1xx_HD.chip
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dev_type F1xx_HD
ref_manual_id 0008
chip_id 0x414 // STM32_CHIPID_F1_HD
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7e0
flash_pagesize 0x800 // 2 KB
sram_size 0x10000 // 64 KB
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2 changes: 1 addition & 1 deletion config/chips/F1xx_LD.chip
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dev_type STM32F1xx_LD
ref_manual_id 0008
chip_id 0x412 // STM32_CHIPID_F1_LD
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7e0
flash_pagesize 0x400 // 1 KB
sram_size 0x2800 // 10 KB
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2 changes: 1 addition & 1 deletion config/chips/F1xx_MD.chip
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dev_type STM32F1xx_MD
ref_manual_id 0008
chip_id 0x410 // STM32_CHIPID_F1_MD
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7e0
flash_pagesize 0x400 // 1 KB
sram_size 0x5000 // 20 KB
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2 changes: 1 addition & 1 deletion config/chips/F1xx_VL_HD.chip
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dev_type STM32F1xx_VL_HD
ref_manual_id 0041
chip_id 0x428 // STM32_CHIPID_F1_VL_HD
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7e0
flash_pagesize 0x800 // 2 KB
sram_size 0x8000 // 32 KB
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2 changes: 1 addition & 1 deletion config/chips/F1xx_VL_MD_LD.chip
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dev_type STM32F1xx_VL_MD_LD
ref_manual_id 0041
chip_id 0x420 // STM32_CHIPID_F1_VL_MD_LD
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7e0
flash_pagesize 0x400 // 1 KB
sram_size 0x2000 // 8 KB /* 0x1000 for low density devices */
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2 changes: 1 addition & 1 deletion config/chips/F1xx_XLD.chip
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dev_type STM32F1xx_XLD
ref_manual_id 0008
chip_id 0x430 // STM32_CHIPID_F1_XLD
flash_type 2 // STM32_FLASH_TYPE_F1_XL
flash_type F1_XL
flash_size_reg 0x1ffff7e0
flash_pagesize 0x800 // 2 KB
sram_size 0x18000 // 96 KB
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2 changes: 1 addition & 1 deletion config/chips/F2xx.chip
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dev_type STM32F2xx
ref_manual_id 0033
chip_id 0x411 // STM32_CHIPID_F2
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x20000 // 128 KB
sram_size 0x20000 // 128 KB
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2 changes: 1 addition & 1 deletion config/chips/F301_F302_F318.chip
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dev_type STM32F301_F302_F318
ref_manual_id 0365 // also RM0366
chip_id 0x439 // STM32_CHIPID_F3xx_SMALL
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0xa000 // 40 KB
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2 changes: 1 addition & 1 deletion config/chips/F302_F303_F358.chip
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dev_type STM32F302_F303_358
ref_manual_id 0365 // also RM0316
chip_id 0x422 // STM32_CHIPID_F3
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0xa000 // 40 KB
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2 changes: 1 addition & 1 deletion config/chips/F302_F303_F398_HD.chip
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dev_type STM32F302_F303_F398_HD
ref_manual_id 0365 // also RM0316 (Rev 5)
chip_id 0x446 // STM32_CHIPID_F303_HD
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0x10000 // 64 KB
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2 changes: 1 addition & 1 deletion config/chips/F303_F328_F334.chip
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dev_type STM32F303_F328_F334
ref_manual_id 0364 // also RM0316
chip_id 0x438 // STM32_CHIPID_F334
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0x3000 // 12 KB
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2 changes: 1 addition & 1 deletion config/chips/F37x.chip
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dev_type STM32F37x
ref_manual_id 0313
chip_id 0x432 // STM32_CHIPID_F37x
flash_type 1 // STM32_FLASH_TYPE_F0_F1_F3
flash_type F0_F1_F3
flash_size_reg 0x1ffff7cc
flash_pagesize 0x800 // 2 KB
sram_size 0xa000 // 40 KB
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2 changes: 1 addition & 1 deletion config/chips/F401xB_xC.chip
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dev_type STM32F401xB_xC
ref_manual_id 0368
chip_id 0x423 // STM32_CHIPID_F4_LP
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x10000 // 64 KB
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2 changes: 1 addition & 1 deletion config/chips/F401xD_xE.chip
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dev_type STM32F401xD_xE
ref_manual_id 0368
chip_id 0x433 // STM32_CHIPID_F4_DE
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x18000 // 96 KB
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2 changes: 1 addition & 1 deletion config/chips/F410.chip
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dev_type STM32F410
ref_manual_id 0401
chip_id 0x458 // STM32_CHIPID_F410
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x8000 // 32 KB
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2 changes: 1 addition & 1 deletion config/chips/F411xC_xE.chip
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dev_type STM32F411xC_xE
ref_manual_id 0383
chip_id 0x431 // STM32_CHIPID_F411xx
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x20000 // 128 KB
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2 changes: 1 addition & 1 deletion config/chips/F412.chip
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dev_type STM32F412
ref_manual_id 0402
chip_id 0x441 // STM32_CHIPID_F412
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x40000 // 256 KB
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2 changes: 1 addition & 1 deletion config/chips/F413_F423.chip
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dev_type STM32F413_F423
ref_manual_id 0430 // RM0430 (Rev 2)
chip_id 0x463 // STM32_CHIPID_F413
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x50000 // 320 KB
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2 changes: 1 addition & 1 deletion config/chips/F42x_F43x.chip
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dev_type STM32F42x_F43x
ref_manual_id 0090 // RM0090 (Rev. 2)
chip_id 0x463 // STM32_CHIPID_F4_HD
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x40000 // 256 KB
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2 changes: 1 addition & 1 deletion config/chips/F446.chip
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dev_type STM32F446
ref_manual_id 0390
chip_id 0x421 // STM32_CHIPID_F446
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x20000 // 128 KB
sram_size 0x20000 // 128 KB
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2 changes: 1 addition & 1 deletion config/chips/F46x_F47x.chip
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dev_type STM32F46x_F47x
ref_manual_id 0090 // RM0090 (Rev. 2)
chip_id 0x434 // STM32_CHIPID_F4_DSI
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x40000 // 256 KB
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2 changes: 1 addition & 1 deletion config/chips/F4x5_F4x7.chip
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dev_type STM32F4x5_F4x7
ref_manual_id 0090 // RM0090 (Rev. 2)
chip_id 0x413 // STM32_CHIPID_F4
flash_type 3 // STM32_FLASH_TYPE_F2_F4
flash_type F2_F4
flash_size_reg 0x1fff7a22
flash_pagesize 0x4000 // 16 KB
sram_size 0x30000 // 192 KB
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2 changes: 1 addition & 1 deletion config/chips/F72x_F73x.chip
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dev_type STM32F72x_F73x
ref_manual_id 0431
chip_id 0x452 // STM32_CHIPID_F72xxx
flash_type 4 // STM32_FLASH_TYPE_F7
flash_type F7
flash_size_reg 0x1ff07a22
flash_pagesize 0x800 // 2 KB
sram_size 0x40000 // 256 KB
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2 changes: 1 addition & 1 deletion config/chips/F74x_F75x.chip
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dev_type STM32F74x_F75x
ref_manual_id 0385
chip_id 0x449 // STM32_CHIPID_F7
flash_type 4 // STM32_FLASH_TYPE_F7
flash_type F7
flash_size_reg 0x1ff0f442
flash_pagesize 0x800 // 2 KB
sram_size 0x50000 // 320 KB
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2 changes: 1 addition & 1 deletion config/chips/F76x_F77x.chip
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dev_type STM32F76x_F77x
ref_manual_id 0410
chip_id 0x451 // STM32_CHIPID_F76xxx
flash_type 4 // STM32_FLASH_TYPE_F7
flash_type F7
flash_size_reg 0x1ff0f442
flash_pagesize 0x800 // 2 KB
sram_size 0x80000 // 512 KB
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2 changes: 1 addition & 1 deletion config/chips/G03x_G04x.chip
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dev_type STM32G03x_G04x
ref_manual_id 0444 // also RM454
chip_id 0x466 // STM32_CHIPID_G0_CAT1
flash_type 5 // STM32_FLASH_TYPE_G0
flash_type G0
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x2000 // 8 KB
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2 changes: 1 addition & 1 deletion config/chips/G05x_G06x.chip
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dev_type STM32G05x_G06x
ref_manual_id 0444
chip_id 0x456 // STM32_CHIPID_G0_CAT4
flash_type 5 // STM32_FLASH_TYPE_G0
flash_type G0
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x9000 // 36 KB
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2 changes: 1 addition & 1 deletion config/chips/G07x_G08x.chip
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dev_type STM32G07x_G08x
ref_manual_id 0444
chip_id 0x460 // STM32_CHIPID_G0_CAT2
flash_type 5 // STM32_FLASH_TYPE_G0
flash_type G0
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x9000 // 36 KB
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2 changes: 1 addition & 1 deletion config/chips/G0Bx_G0Cx.chip
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dev_type STM32G0Bx_G0Cx
ref_manual_id 0444
chip_id 0x467 // STM32_CHIPID_G0_CAT3
flash_type 5 // STM32_FLASH_TYPE_G0
flash_type G0
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x9000 // 36 KB
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2 changes: 1 addition & 1 deletion config/chips/G43x_G44x.chip
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dev_type STM32G43x_G44x
ref_manual_id 0440
chip_id 0x468 // STM32_CHIPID_G4_CAT2
flash_type 6 // STM32_FLASH_TYPE_G4
flash_type G4
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x8000 // 32 KB
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2 changes: 1 addition & 1 deletion config/chips/G47x_G48x.chip
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dev_type STM32G47x_G48x
ref_manual_id 0440
chip_id 0x469 // STM32_CHIPID_G4_CAT3
flash_type 6 // STM32_FLASH_TYPE_G4
flash_type G4
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x20000 // 128 KB
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2 changes: 1 addition & 1 deletion config/chips/G49x_G4Ax.chip
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dev_type STM32G49x_G4Ax
ref_manual_id 0440
chip_id 0x479 // STM32_CHIPID_G4_CAT4
flash_type 6 // STM32_FLASH_TYPE_G4
flash_type G4
flash_size_reg 0x1fff75e0
flash_pagesize 0x800 // 2 KB
sram_size 0x1c000 // 112 KB
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2 changes: 1 addition & 1 deletion config/chips/H72x_H73x.chip
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dev_type STM32H72x_H73x
ref_manual_id 0468
chip_id 0x483 // STM32_CHIPID_H72x
flash_type 7 // STM32_FLASH_TYPE_H7
flash_type H7
flash_size_reg 0x1ff1e880
flash_pagesize 0x20000 // 128 KB
sram_size 0x20000 // 128 KB "DTCM"
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2 changes: 1 addition & 1 deletion config/chips/H74x_H75x.chip
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dev_type STM32H74x_H75x
ref_manual_id 0433
chip_id 0x450 // STM32_CHIPID_H74xxx
flash_type 7 // STM32_FLASH_TYPE_H7
flash_type H7
flash_size_reg 0x1ff1e880
flash_pagesize 0x20000 // 128 KB
sram_size 0x20000 // 128 KB "DTCM"
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2 changes: 1 addition & 1 deletion config/chips/H7Ax_H7Bx.chip
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dev_type STM32H7Ax_H7Bx
ref_manual_id 0455
chip_id 0x480 // STM32_CHIPID_H7Ax
flash_type 7 // STM32_FLASH_TYPE_H7
flash_type H7
flash_size_reg 0x08fff80c
flash_pagesize 0x2000 // 8 KB
sram_size 0x20000 // 128 KB "DTCM"
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2 changes: 1 addition & 1 deletion config/chips/L0xxx_Cat_1.chip
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dev_type STM32L0xxx_Cat_1
ref_manual_id 0451 // also RM0377
chip_id 0x457 // STM32_CHIPID_L011
flash_type 8 // STM32_FLASH_TYPE_L0_L1
flash_type L0_L1
flash_size_reg 0x1ff8007c
flash_pagesize 0x80 // 128 B
sram_size 0x2000 // 8 KB
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2 changes: 1 addition & 1 deletion config/chips/L0xxx_Cat_2.chip
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dev_type STM32L0xxx_Cat_2
ref_manual_id 0451 // also RM0377
chip_id 0x425 // STM32_CHIPID_L0_CAT2
flash_type 8 // STM32_FLASH_TYPE_L0_L1
flash_type L0_L1
flash_size_reg 0x1ff8007c
flash_pagesize 0x80 // 128 B
sram_size 0x2000 // 8 KB
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2 changes: 1 addition & 1 deletion config/chips/L0xxx_Cat_3.chip
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dev_type STM32L0xxx_Cat_3
ref_manual_id 0451 // also RM0367 & RM0377
chip_id 0x417 // STM32_CHIPID_L0
flash_type 8 // STM32_FLASH_TYPE_L0_L1
flash_type L0_L1
flash_size_reg 0x1ff8007c
flash_pagesize 0x80 // 128 B
sram_size 0x2000 // 8 KB
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