Add support for writing option bytes to the Nucleo 144 STM32F767ZI. T…

…his adds --area=option_boot_add, --area=optcr and --area=optcr1
stlink-org · Jun 25, 2020 · c1ea72d · c1ea72d
1 parent 4337408
commit c1ea72d
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Showing 9 changed files with 750 additions and 103 deletions.
diff --git a/include/stlink.h b/include/stlink.h
@@ -120,7 +120,8 @@ enum stlink_flash_type {
     STLINK_FLASH_TYPE_UNKNOWN = 0,
     STLINK_FLASH_TYPE_F0,    // used by f0, f1 (except f1xl),f3. */
     STLINK_FLASH_TYPE_F1_XL, // f0 flash with dual bank, apparently */
-    STLINK_FLASH_TYPE_F4,    // used by f2, f4, f7 */
+    STLINK_FLASH_TYPE_F4,    // used by f2, f4 */
+    STLINK_FLASH_TYPE_F7,
     STLINK_FLASH_TYPE_L0,    // l0, l1 */
     STLINK_FLASH_TYPE_L4,    // l4, l4+ */
     STLINK_FLASH_TYPE_G0,
@@ -146,8 +147,8 @@ struct stlink_reg {
 typedef uint32_t stm32_addr_t;
 
 typedef struct flash_loader {
-stm32_addr_t loader_addr; // loader sram addr
-stm32_addr_t buf_addr;    // buffer sram address
+    stm32_addr_t loader_addr; // loader sram addr
+    stm32_addr_t buf_addr;    // buffer sram address
 } flash_loader_t;
 
 typedef struct _cortex_m3_cpuid_ {
@@ -288,7 +289,14 @@ int stlink_fread(stlink_t* sl, const char* path, bool is_ihex, stm32_addr_t addr
 int stlink_load_device_params(stlink_t *sl);
 
 int stlink_read_option_bytes32(stlink_t *sl, uint32_t* option_byte);
+int stlink_read_option_bytes_boot_add32(stlink_t *sl, uint32_t* option_byte);
+int stlink_read_option_control_register32(stlink_t *sl, uint32_t* option_byte);
+int stlink_read_option_control_register1_32(stlink_t *sl, uint32_t* option_byte);
+
 int stlink_write_option_bytes32(stlink_t *sl, uint32_t option_byte);
+int stlink_write_option_bytes_boot_add32(stlink_t *sl, uint32_t option_bytes_boot_add);
+int stlink_write_option_control_register32(stlink_t *sl, uint32_t option_control_register);
+int stlink_write_option_control_register1_32(stlink_t *sl, uint32_t option_control_register1);
 
 int stlink_write_option_bytes(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t len);
 int stlink_fwrite_option_bytes(stlink_t *sl, const char* path, stm32_addr_t addr);

diff --git a/include/stlink/tools/flash.h b/include/stlink/tools/flash.h
@@ -11,7 +11,7 @@
 
 enum flash_cmd {FLASH_CMD_NONE = 0, FLASH_CMD_WRITE = 1, FLASH_CMD_READ = 2, FLASH_CMD_ERASE = 3, CMD_RESET = 4};
 enum flash_format {FLASH_FORMAT_BINARY = 0, FLASH_FORMAT_IHEX = 1};
-enum flash_area {FLASH_MAIN_MEMORY = 0, FLASH_SYSTEM_MEMORY = 1,FLASH_OTP = 2, FLASH_OPTION_BYTES = 3};
+enum flash_area {FLASH_MAIN_MEMORY = 0, FLASH_SYSTEM_MEMORY = 1, FLASH_OTP = 2, FLASH_OPTION_BYTES = 3, FLASH_OPTION_BYTES_BOOT_ADD = 4, FLASH_OPTCR = 5, FLASH_OPTCR1 = 6};
 struct flash_opts
 {
     enum flash_cmd cmd;

diff --git a/include/stm32.h b/include/stm32.h
@@ -20,5 +20,6 @@
 #define STM32_F2_OPTION_BYTES_BASE ((uint32_t)0x1FFFC000)
 #define STM32_L4_OPTION_BYTES_BASE ((uint32_t)0x1FFF7800)
 #define STM32_L1_OPTION_BYTES_BASE ((uint32_t)0x1FF80000)
+#define STM32_F7_OPTION_BYTES_BASE ((uint32_t)0x1FFF0000)
 
 #endif /* STM32_H */
diff --git a/src/chipid.c b/src/chipid.c
@@ -6,12 +6,14 @@ static const struct stlink_chipid_params devices[] = {
             //RM0410 document was used to find these paramaters
             .chip_id = STLINK_CHIPID_STM32_F7XXXX,
             .description = "F76xxx",
-            .flash_type = STLINK_FLASH_TYPE_F4,
-            .flash_size_reg = 0x1ff0f442,      // section 45.2
-            .flash_pagesize = 0x800,           // No flash pages
-            .sram_size = 0x80000,              // "SRAM" byte size in hex from
-            .bootrom_base = 0x00200000,        //! "System memory" starting address from
-            .bootrom_size = 0xEDC0             //! @todo "System memory" byte size in hex from
+            .flash_type = STLINK_FLASH_TYPE_F7,
+            .flash_size_reg = 0x1ff0f442,              // section 45.2
+            .flash_pagesize = 0x800,                   // No flash pages
+            .sram_size = 0x80000,                      // "SRAM" byte size in hex from
+            .bootrom_base = 0x00200000,                //! "System memory" starting address from
+            .bootrom_size = 0xEDC0,                    //! @todo "System memory" byte size in hex from
+            .option_base = STM32_F7_OPTION_BYTES_BASE, // Used for reading back the option bytes, writing uses FLASH_F7_OPTCR and FLASH_F7_OPTCR1
+            .option_size = 0x20
         },
         {
             //RM0385 and DS10916 document was used to find these paramaters